cnt_4b.tan.rpt

很多vhdl例程代码

; Timing Analyzer Settings                                                                                                  ;
+-------------------------------------------------------+--------------------+------+-------------------------+-------------+
; Option                                                ; Setting            ; From ; To                      ; Entity Name ;
+-------------------------------------------------------+--------------------+------+-------------------------+-------------+
; Device Name                                           ; EP1C6Q240C8        ;      ;                         ;             ;
; Timing Models                                         ; Final              ;      ;                         ;             ;
; Number of source nodes to report per destination node ; 10                 ;      ;                         ;             ;
; Number of destination nodes to report                 ; 10                 ;      ;                         ;             ;
; Number of paths to report                             ; 200                ;      ;                         ;             ;
; Report Minimum Timing Checks                          ; Off                ;      ;                         ;             ;
; Use Fast Timing Models                                ; Off                ;      ;                         ;             ;
; Report IO Paths Separately                            ; Off                ;      ;                         ;             ;
; Default hold multicycle                               ; Same as Multicycle ;      ;                         ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;                         ;             ;
; Cut off read during write signal paths                ; On                 ;      ;                         ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;                         ;             ;
; Report Combined Fast/Slow Timing                      ; Off                ;      ;                         ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;                         ;             ;
; Analyze latches as synchronous elements               ; Off                ;      ;                         ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;                         ;             ;
; Enable Clock Latency                                  ; Off                ;      ;                         ;             ;
; Clock Settings                                        ; clock 48M          ;      ; clock_48M               ;             ;
; Clock Settings                                        ; clockout           ;      ; int_div:inst14|ClockOut ;             ;
; Clock Settings                                        ; temp               ;      ; int_div:inst14|Temp1    ;             ;
; Clock Settings                                        ; temp               ;      ; int_div:inst14|Temp2    ;             ;
+-------------------------------------------------------+--------------------+------+-------------------------+-------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                                          ;
+-------------------------+--------------------+---------------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name         ; Clock Setting Name ; Type          ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-------------------------+--------------------+---------------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; int_div:inst14|ClockOut ; clockout           ; Internal Node ; 50.0 MHz         ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
; int_div:inst14|Temp2    ; temp               ; Internal Node ; 50.0 MHz         ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
; int_div:inst14|Temp1    ; temp               ; Internal Node ; 50.0 MHz         ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
; clock_48M               ; clock_48M          ; User Pin      ; 50.0 MHz         ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
; key1                    ;                    ; User Pin      ; NONE             ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
+-------------------------+--------------------+---------------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'int_div:inst14|ClockOut'                                                                                                                                                                                                      ;
+-----------+-----------------------------------------------+--------------------+--------------------+-------------------------+-------------------------+-----------------------------+---------------------------+-------------------------+
; Slack     ; Actual fmax (period)                          ; From               ; To                 ; From Clock              ; To Clock                ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------+-----------------------------------------------+--------------------+--------------------+-------------------------+-------------------------+-----------------------------+---------------------------+-------------------------+
; 17.618 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; cnt_4b:inst|cnt[0] ; cnt_4b:inst|cnt[3] ; int_div:inst14|ClockOut ; int_div:inst14|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.121 ns                ;
; 17.675 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; cnt_4b:inst|cnt[1] ; cnt_4b:inst|cnt[3] ; int_div:inst14|ClockOut ; int_div:inst14|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.064 ns                ;
; 17.698 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; cnt_4b:inst|cnt[0] ; cnt_4b:inst|cnt[2] ; int_div:inst14|ClockOut ; int_div:inst14|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.041 ns                ;
; 17.755 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; cnt_4b:inst|cnt[1] ; cnt_4b:inst|cnt[2] ; int_div:inst14|ClockOut ; int_div:inst14|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 1.984 ns                ;
; 17.778 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; cnt_4b:inst|cnt[0] ; cnt_4b:inst|cnt[1] ; int_div:inst14|ClockOut ; int_div:inst14|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 1.961 ns                ;
; 17.956 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; cnt_4b:inst|cnt[2] ; cnt_4b:inst|cnt[3] ; int_div:inst14|ClockOut ; int_div:inst14|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 1.783 ns                ;
; 18.372 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; cnt_4b:inst|cnt[3] ; cnt_4b:inst|cnt[3] ; int_div:inst14|ClockOut ; int_div:inst14|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 1.367 ns                ;
; 18.379 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; cnt_4b:inst|cnt[1] ; cnt_4b:inst|cnt[1] ; int_div:inst14|ClockOut ; int_div:inst14|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 1.360 ns                ;
; 18.402 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; cnt_4b:inst|cnt[0] ; cnt_4b:inst|cnt[0] ; int_div:inst14|ClockOut ; int_div:inst14|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 1.337 ns                ;
; 18.568 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; cnt_4b:inst|cnt[2] ; cnt_4b:inst|cnt[2] ; int_div:inst14|ClockOut ; int_div:inst14|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 1.171 ns                ;
+-----------+-----------------------------------------------+--------------------+--------------------+-------------------------+-------------------------+-----------------------------+---------------------------+-------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clock_48M'                                                                                                                                                                                                                                             ;
+-----------------------------------------+-----------------------------------------------------+----------------------------+----------------------------+------------+-----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                       ; To                         ; From Clock ; To Clock  ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;