cnt_4b.map.eqn

很多vhdl例程代码

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--B1_cnt[0] is cnt_4b:inst|cnt[0]
--operation mode is arithmetic

B1_cnt[0]_lut_out = B1_cnt[0] $ inst5;
B1_cnt[0] = DFFEAS(B1_cnt[0]_lut_out, D1_ClockOut, VCC, , , , , !key2, );

--B1L3 is cnt_4b:inst|cnt[0]~46
--operation mode is arithmetic

B1L3 = CARRY(B1_cnt[0] & inst5);


--B1_cnt[1] is cnt_4b:inst|cnt[1]
--operation mode is arithmetic

B1_cnt[1]_carry_eqn = B1L3;
B1_cnt[1]_lut_out = B1_cnt[1] $ (B1_cnt[1]_carry_eqn);
B1_cnt[1] = DFFEAS(B1_cnt[1]_lut_out, D1_ClockOut, VCC, , , , , !key2, );

--B1L5 is cnt_4b:inst|cnt[1]~50
--operation mode is arithmetic

B1L5 = CARRY(!B1L3 # !B1_cnt[1]);


--B1_cnt[2] is cnt_4b:inst|cnt[2]
--operation mode is arithmetic

B1_cnt[2]_carry_eqn = B1L5;
B1_cnt[2]_lut_out = B1_cnt[2] $ (!B1_cnt[2]_carry_eqn);
B1_cnt[2] = DFFEAS(B1_cnt[2]_lut_out, D1_ClockOut, VCC, , , , , !key2, );

--B1L7 is cnt_4b:inst|cnt[2]~54
--operation mode is arithmetic

B1L7 = CARRY(B1_cnt[2] & (!B1L5));


--B1_cnt[3] is cnt_4b:inst|cnt[3]
--operation mode is normal

B1_cnt[3]_carry_eqn = B1L7;
B1_cnt[3]_lut_out = B1_cnt[3] $ (B1_cnt[3]_carry_eqn);
B1_cnt[3] = DFFEAS(B1_cnt[3]_lut_out, D1_ClockOut, VCC, , , , , !key2, );


--B1L9 is cnt_4b:inst|cout~27
--operation mode is normal

B1L9 = B1_cnt[0] & B1_cnt[1] & B1_cnt[2] & B1_cnt[3];


--inst5 is inst5
--operation mode is normal

inst5_lut_out = !inst5;
inst5 = DFFEAS(inst5_lut_out, key1, VCC, , , , , , );


--C1L7 is decl7s:inst1|seg[6]~103
--operation mode is normal

C1L7 = B1_cnt[0] & (B1_cnt[3] # B1_cnt[1] $ B1_cnt[2]) # !B1_cnt[0] & (B1_cnt[1] # B1_cnt[2] $ B1_cnt[3]);


--C1L6 is decl7s:inst1|seg[5]~104
--operation mode is normal

C1L6 = B1_cnt[0] & (B1_cnt[3] $ (B1_cnt[1] # !B1_cnt[2])) # !B1_cnt[0] & B1_cnt[1] & !B1_cnt[2] & !B1_cnt[3];


--C1L5 is decl7s:inst1|seg[4]~105
--operation mode is normal

C1L5 = B1_cnt[1] & B1_cnt[0] & (!B1_cnt[3]) # !B1_cnt[1] & (B1_cnt[2] & (!B1_cnt[3]) # !B1_cnt[2] & B1_cnt[0]);


--C1L4 is decl7s:inst1|seg[3]~106
--operation mode is normal

C1L4 = B1_cnt[1] & (B1_cnt[0] & B1_cnt[2] # !B1_cnt[0] & !B1_cnt[2] & B1_cnt[3]) # !B1_cnt[1] & !B1_cnt[3] & (B1_cnt[0] $ B1_cnt[2]);


--C1L3 is decl7s:inst1|seg[2]~107
--operation mode is normal

C1L3 = B1_cnt[2] & B1_cnt[3] & (B1_cnt[1] # !B1_cnt[0]) # !B1_cnt[2] & !B1_cnt[0] & B1_cnt[1] & !B1_cnt[3];


--C1L2 is decl7s:inst1|seg[1]~108
--operation mode is normal

C1L2 = B1_cnt[1] & (B1_cnt[0] & (B1_cnt[3]) # !B1_cnt[0] & B1_cnt[2]) # !B1_cnt[1] & B1_cnt[2] & (B1_cnt[0] $ B1_cnt[3]);


--C1L1 is decl7s:inst1|seg[0]~109
--operation mode is normal

C1L1 = B1_cnt[2] & !B1_cnt[1] & (B1_cnt[0] $ !B1_cnt[3]) # !B1_cnt[2] & B1_cnt[0] & (B1_cnt[1] $ !B1_cnt[3]);


--D1_Temp1 is int_div:inst14|Temp1
--operation mode is normal

D1_Temp1_lut_out = !D1_Temp1;
D1_Temp1 = DFFEAS(D1_Temp1_lut_out, clock_48M, VCC, , D1L08, , , , );


--D1_Temp2 is int_div:inst14|Temp2
--operation mode is normal

D1_Temp2_lut_out = !D1_Temp2;
D1_Temp2 = DFFEAS(D1_Temp2_lut_out, !clock_48M, VCC, , D1L18, , , , );


--D1_ClockOut is int_div:inst14|ClockOut
--operation mode is normal

D1_ClockOut = D1_Temp1 $ D1_Temp2;


--D1_Counter[24] is int_div:inst14|Counter[24]
--operation mode is normal

D1_Counter[24]_lut_out = D1L1;
D1_Counter[24] = DFFEAS(D1_Counter[24]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[21] is int_div:inst14|Counter[21]
--operation mode is normal

D1_Counter[21]_lut_out = D1L3;
D1_Counter[21] = DFFEAS(D1_Counter[21]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[23] is int_div:inst14|Counter[23]
--operation mode is normal

D1_Counter[23]_lut_out = D1L5 & !D1L08;
D1_Counter[23] = DFFEAS(D1_Counter[23]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[20] is int_div:inst14|Counter[20]
--operation mode is normal

D1_Counter[20]_lut_out = D1L7 & !D1L08;
D1_Counter[20] = DFFEAS(D1_Counter[20]_lut_out, clock_48M, VCC, , , , , , );


--D1L28 is int_div:inst14|reduce_nor~318
--operation mode is normal

D1L28 = D1_Counter[24] # D1_Counter[21] # !D1_Counter[20] # !D1_Counter[23];


--D1_Counter[17] is int_div:inst14|Counter[17]
--operation mode is normal

D1_Counter[17]_lut_out = D1L9;
D1_Counter[17] = DFFEAS(D1_Counter[17]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[12] is int_div:inst14|Counter[12]
--operation mode is normal

D1_Counter[12]_lut_out = D1L11;
D1_Counter[12] = DFFEAS(D1_Counter[12]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[14] is int_div:inst14|Counter[14]
--operation mode is normal

D1_Counter[14]_lut_out = D1L31 & !D1L08;
D1_Counter[14] = DFFEAS(D1_Counter[14]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[11] is int_div:inst14|Counter[11]
--operation mode is normal

D1_Counter[11]_lut_out = D1L51 & !D1L08;
D1_Counter[11] = DFFEAS(D1_Counter[11]_lut_out, clock_48M, VCC, , , , , , );


--D1L38 is int_div:inst14|reduce_nor~319
--operation mode is normal

D1L38 = D1_Counter[17] # D1_Counter[12] # !D1_Counter[11] # !D1_Counter[14];


--D1_Counter[10] is int_div:inst14|Counter[10]
--operation mode is normal

D1_Counter[10]_lut_out = D1L71 & !D1L08;
D1_Counter[10] = DFFEAS(D1_Counter[10]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[8] is int_div:inst14|Counter[8]
--operation mode is normal

D1_Counter[8]_lut_out = D1L91;
D1_Counter[8] = DFFEAS(D1_Counter[8]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[7] is int_div:inst14|Counter[7]
--operation mode is normal

D1_Counter[7]_lut_out = D1L12;
D1_Counter[7] = DFFEAS(D1_Counter[7]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[6] is int_div:inst14|Counter[6]
--operation mode is normal

D1_Counter[6]_lut_out = D1L32;
D1_Counter[6] = DFFEAS(D1_Counter[6]_lut_out, clock_48M, VCC, , , , , , );


--D1L48 is int_div:inst14|reduce_nor~320
--operation mode is normal

D1L48 = D1_Counter[10] # !D1_Counter[6] # !D1_Counter[7] # !D1_Counter[8];


--D1_Counter[5] is int_div:inst14|Counter[5]
--operation mode is normal

D1_Counter[5]_lut_out = D1L52;
D1_Counter[5] = DFFEAS(D1_Counter[5]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[4] is int_div:inst14|Counter[4]
--operation mode is normal

D1_Counter[4]_lut_out = D1L72;
D1_Counter[4] = DFFEAS(D1_Counter[4]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[3] is int_div:inst14|Counter[3]
--operation mode is normal

D1_Counter[3]_lut_out = D1L92;
D1_Counter[3] = DFFEAS(D1_Counter[3]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[2] is int_div:inst14|Counter[2]
--operation mode is normal

D1_Counter[2]_lut_out = D1L13;
D1_Counter[2] = DFFEAS(D1_Counter[2]_lut_out, clock_48M, VCC, , , , , , );


--D1L58 is int_div:inst14|reduce_nor~321
--operation mode is normal

D1L58 = !D1_Counter[2] # !D1_Counter[3] # !D1_Counter[4] # !D1_Counter[5];


--D1_Counter[0] is int_div:inst14|Counter[0]
--operation mode is normal

D1_Counter[0]_lut_out = D1L33;
D1_Counter[0] = DFFEAS(D1_Counter[0]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[25] is int_div:inst14|Counter[25]
--operation mode is normal

D1_Counter[25]_lut_out = D1L53 & !D1L08;
D1_Counter[25] = DFFEAS(D1_Counter[25]_lut_out, clock_48M, VCC, , , , , , );


--D1L68 is int_div:inst14|reduce_nor~322
--operation mode is normal

D1L68 = !D1_Counter[25] # !D1_Counter[0];


--D1_Counter[1] is int_div:inst14|Counter[1]
--operation mode is normal

D1_Counter[1]_lut_out = D1L63;
D1_Counter[1] = DFFEAS(D1_Counter[1]_lut_out, clock_48M, VCC, , , , , , );


--D1L78 is int_div:inst14|reduce_nor~323
--operation mode is normal

D1L78 = D1L48 # D1L58 # D1L68 # !D1_Counter[1];


--D1_Counter[22] is int_div:inst14|Counter[22]
--operation mode is normal

D1_Counter[22]_lut_out = D1L83 & !D1L08;
D1_Counter[22] = DFFEAS(D1_Counter[22]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[19] is int_div:inst14|Counter[19]
--operation mode is normal

D1_Counter[19]_lut_out = D1L04 & !D1L08;
D1_Counter[19] = DFFEAS(D1_Counter[19]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[18] is int_div:inst14|Counter[18]
--operation mode is normal

D1_Counter[18]_lut_out = D1L24 & !D1L08;
D1_Counter[18] = DFFEAS(D1_Counter[18]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[16] is int_div:inst14|Counter[16]
--operation mode is normal

D1_Counter[16]_lut_out = D1L44;
D1_Counter[16] = DFFEAS(D1_Counter[16]_lut_out, clock_48M, VCC, , , , , , );


--D1L88 is int_div:inst14|reduce_nor~324
--operation mode is normal

D1L88 = D1_Counter[22] & D1_Counter[19] & D1_Counter[18] & !D1_Counter[16];


--D1_Counter[13] is int_div:inst14|Counter[13]
--operation mode is normal

D1_Counter[13]_lut_out = D1L64 & !D1L08;
D1_Counter[13] = DFFEAS(D1_Counter[13]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[9] is int_div:inst14|Counter[9]
--operation mode is normal

D1_Counter[9]_lut_out = D1L84;
D1_Counter[9] = DFFEAS(D1_Counter[9]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[15] is int_div:inst14|Counter[15]
--operation mode is normal

D1_Counter[15]_lut_out = D1L05;
D1_Counter[15] = DFFEAS(D1_Counter[15]_lut_out, clock_48M, VCC, , , , , , );


--D1L98 is int_div:inst14|reduce_nor~325
--operation mode is normal

D1L98 = D1L88 & D1_Counter[13] & D1_Counter[9] & !D1_Counter[15];


--D1L08 is int_div:inst14|reduce_nor~0
--operation mode is normal

D1L08 = !D1L28 & !D1L38 & !D1L78 & D1L98;


--D1L09 is int_div:inst14|reduce_nor~326
--operation mode is normal

D1L09 = D1_Counter[23] # D1_Counter[20] # !D1_Counter[21] # !D1_Counter[24];


--D1L19 is int_div:inst14|reduce_nor~327
--operation mode is normal

D1L19 = D1_Counter[14] # D1_Counter[11] # !D1_Counter[12] # !D1_Counter[17];


--D1L29 is int_div:inst14|reduce_nor~328
--operation mode is normal

D1L29 = D1_Counter[8] # D1_Counter[7] # D1_Counter[6] # !D1_Counter[10];


--D1L39 is int_div:inst14|reduce_nor~329
--operation mode is normal

D1L39 = D1_Counter[5] # D1_Counter[4] # D1_Counter[3] # D1_Counter[2];


--D1L49 is int_div:inst14|reduce_nor~330
--operation mode is normal

D1L49 = D1_Counter[0] # D1_Counter[25];


--D1L59 is int_div:inst14|reduce_nor~331
--operation mode is normal

D1L59 = D1_Counter[1] # D1L29 # D1L39 # D1L49;


--D1L18 is int_div:inst14|reduce_nor~1
--operation mode is normal

D1L18 = !D1L09 & !D1L19 & !D1L59 & D1L98;


--D1L1 is int_div:inst14|add~391
--operation mode is arithmetic

D1L1_carry_eqn = D1L6;
D1L1 = D1_Counter[24] $ (!D1L1_carry_eqn);

--D1L2 is int_div:inst14|add~393
--operation mode is arithmetic

D1L2 = CARRY(D1_Counter[24] & (!D1L6));


--D1L3 is int_div:inst14|add~396
--operation mode is arithmetic