📄 keyled.fit.rpt
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; - reduce_nor~4 ; 1 ; ON ;
; - reduce_nor~5 ; 1 ; ON ;
; - reduce_nor~6 ; 1 ; ON ;
+----------------------+-------------------+---------+
+---------------------------------+
; Non-Global High Fan-Out Signals ;
+---------------+-----------------+
; Name ; Fan-Out ;
+---------------+-----------------+
; key[6] ; 4 ;
; key[5] ; 4 ;
; key[4] ; 4 ;
; key[1] ; 4 ;
; key[2] ; 4 ;
; key[7] ; 4 ;
; key[3] ; 4 ;
; key[0] ; 4 ;
; reduce_nor~94 ; 3 ;
; reduce_nor~93 ; 3 ;
; reduce_nor~92 ; 3 ;
; reduce_nor~91 ; 3 ;
; reduce_nor~7 ; 1 ;
; reduce_nor~6 ; 1 ;
; reduce_nor~5 ; 1 ;
; reduce_nor~4 ; 1 ;
; reduce_nor~3 ; 1 ;
; reduce_nor~2 ; 1 ;
; reduce_nor~1 ; 1 ;
; reduce_nor~0 ; 1 ;
+---------------+-----------------+
+----------------------------------------------------+
; Interconnect Usage Summary ;
+----------------------------+-----------------------+
; Interconnect Resource Type ; Usage ;
+----------------------------+-----------------------+
; C4s ; 22 / 16,320 ( < 1 % ) ;
; Direct links ; 0 / 21,944 ( 0 % ) ;
; Global clocks ; 0 / 8 ( 0 % ) ;
; LAB clocks ; 0 / 240 ( 0 % ) ;
; LUT chains ; 2 / 5,382 ( < 1 % ) ;
; Local interconnects ; 21 / 21,944 ( < 1 % ) ;
; M4K buffers ; 0 / 720 ( 0 % ) ;
; R4s ; 64 / 14,640 ( < 1 % ) ;
+----------------------------+-----------------------+
+--------------------------------------------------------------------------+
; LAB Logic Elements ;
+--------------------------------------------+-----------------------------+
; Number of Logic Elements (Average = 6.00) ; Number of LABs (Total = 2) ;
+--------------------------------------------+-----------------------------+
; 1 ; 0 ;
; 2 ; 1 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 1 ;
+--------------------------------------------+-----------------------------+
+---------------------------------------------------------------------------+
; LAB Signals Sourced ;
+---------------------------------------------+-----------------------------+
; Number of Signals Sourced (Average = 6.00) ; Number of LABs (Total = 2) ;
+---------------------------------------------+-----------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 1 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 1 ;
+---------------------------------------------+-----------------------------+
+-------------------------------------------------------------------------------+
; LAB Signals Sourced Out ;
+-------------------------------------------------+-----------------------------+
; Number of Signals Sourced Out (Average = 4.50) ; Number of LABs (Total = 2) ;
+-------------------------------------------------+-----------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 1 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 1 ;
+-------------------------------------------------+-----------------------------+
+---------------------------------------------------------------------------+
; LAB Distinct Inputs ;
+---------------------------------------------+-----------------------------+
; Number of Distinct Inputs (Average = 6.00) ; Number of LABs (Total = 2) ;
+---------------------------------------------+-----------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 1 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 1 ;
+---------------------------------------------+-----------------------------+
+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
Info: Version 5.0 Build 168 06/22/2005 Service Pack 1.04 SJ Full Version
Info: Processing started: Fri Sep 15 14:17:47 2006
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off keyled -c keyled
Info: Selected device EP1C6Q240C8 for design "keyled"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices.
Info: Device EP1C12Q240C8 is compatible
Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
Info: Assuming a global fmax requirement of 1 MHz
Info: Not setting a global tsu requirement
Info: Not setting a global tco requirement
Info: Not setting a global tpd requirement
Info: Performing register packing on registers with non-logic cell location assignments
Info: Completed register packing on registers with non-logic cell location assignments
Info: Completed User Assigned Global Signals Promotion Operation
Info: DQS I/O pins require 0 global routing resourc
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