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📄 led_water.fit.eqn

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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--C1_led_r[7] is ledwater:inst1|led_r[7] at LC_X1_Y5_N3
--operation mode is normal

C1_led_r[7]_lut_out = C1_led_r[6] # !C1_led_r[8] & !C1L21 & !C1L11;
C1_led_r[7] = DFFEAS(C1_led_r[7]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_led_r[6] is ledwater:inst1|led_r[6] at LC_X1_Y5_N9
--operation mode is normal

C1_led_r[6]_lut_out = C1_led_r[5] # !C1L21 & !C1_led_r[8] & !C1L11;
C1_led_r[6] = DFFEAS(C1_led_r[6]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_led_r[5] is ledwater:inst1|led_r[5] at LC_X1_Y5_N7
--operation mode is normal

C1_led_r[5]_lut_out = C1_led_r[4] # !C1_led_r[8] & !C1L21 & !C1L11;
C1_led_r[5] = DFFEAS(C1_led_r[5]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_led_r[4] is ledwater:inst1|led_r[4] at LC_X1_Y5_N8
--operation mode is normal

C1_led_r[4]_lut_out = C1_led_r[3] # !C1L11 & !C1L21 & !C1_led_r[8];
C1_led_r[4] = DFFEAS(C1_led_r[4]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_led_r[3] is ledwater:inst1|led_r[3] at LC_X1_Y5_N1
--operation mode is normal

C1_led_r[3]_lut_out = C1_led_r[2] # !C1L11 & !C1L21 & !C1_led_r[8];
C1_led_r[3] = DFFEAS(C1_led_r[3]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_led_r[2] is ledwater:inst1|led_r[2] at LC_X1_Y5_N5
--operation mode is normal

C1_led_r[2]_lut_out = C1_led_r[1] # !C1_led_r[8] & !C1L21 & !C1L11;
C1_led_r[2] = DFFEAS(C1_led_r[2]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_led_r[1] is ledwater:inst1|led_r[1] at LC_X1_Y5_N2
--operation mode is normal

C1_led_r[1]_lut_out = C1_led_r[0] # !C1_led_r[8] & !C1L21 & !C1L11;
C1_led_r[1] = DFFEAS(C1_led_r[1]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_led_r[0] is ledwater:inst1|led_r[0] at LC_X1_Y5_N4
--operation mode is normal

C1_led_r[0]_lut_out = !C1L21 & !C1_led_r[8] & !C1L11;
C1_led_r[0] = DFFEAS(C1_led_r[0]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1L11 is ledwater:inst1|reduce_nor~110 at LC_X1_Y5_N6
--operation mode is normal

C1L11 = C1_led_r[6] # C1_led_r[4] # C1_led_r[5] # C1_led_r[7];


--C1_led_r[8] is ledwater:inst1|led_r[8] at LC_X2_Y5_N2
--operation mode is normal

C1_led_r[8]_lut_out = C1_led_r[7] # !C1_led_r[8] & !C1L21 & !C1L11;
C1_led_r[8] = DFFEAS(C1_led_r[8]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1L21 is ledwater:inst1|reduce_nor~111 at LC_X1_Y5_N0
--operation mode is normal

C1L21 = C1_led_r[1] # C1_led_r[2] # C1_led_r[0] # C1_led_r[3];


--B1_Temp1 is int_div:inst|Temp1 at LC_X8_Y7_N5
--operation mode is normal

B1_Temp1_lut_out = !B1_Temp1;
B1_Temp1 = DFFEAS(B1_Temp1_lut_out, GLOBAL(clock), VCC, , B1L001, , , , );


--B1_Temp2 is int_div:inst|Temp2 at LC_X9_Y7_N2
--operation mode is normal

B1_Temp2_lut_out = !B1_Temp2;
B1_Temp2 = DFFEAS(B1_Temp2_lut_out, !GLOBAL(clock), VCC, , B1L101, , , , );


--B1_ClockOut is int_div:inst|ClockOut at LC_X8_Y7_N2
--operation mode is normal

B1_ClockOut = B1_Temp2 $ B1_Temp1;


--B1_Counter[23] is int_div:inst|Counter[23] at LC_X11_Y6_N9
--operation mode is normal

B1_Counter[23]_lut_out = !B1L001 & B1L7;
B1_Counter[23] = DFFEAS(B1_Counter[23]_lut_out, GLOBAL(clock), VCC, , , , , , );


--B1_Counter[20] is int_div:inst|Counter[20] at LC_X10_Y7_N5
--operation mode is normal

B1_Counter[20]_lut_out = !B1L001 & B1L01;
B1_Counter[20] = DFFEAS(B1_Counter[20]_lut_out, GLOBAL(clock), VCC, , , , , , );


--B1L201 is int_div:inst|reduce_nor~318 at LC_X10_Y7_N6
--operation mode is normal

B1_Counter[24]_qfbk = B1_Counter[24];
B1L201 = B1_Counter[21] # B1_Counter[24]_qfbk # !B1_Counter[23] # !B1_Counter[20];

--B1_Counter[24] is int_div:inst|Counter[24] at LC_X10_Y7_N6
--operation mode is normal

B1_Counter[24] = DFFEAS(B1L201, GLOBAL(clock), VCC, , , B1L1, , , VCC);


--B1_Counter[14] is int_div:inst|Counter[14] at LC_X10_Y7_N3
--operation mode is normal

B1_Counter[14]_lut_out = !B1L001 & B1L71;
B1_Counter[14] = DFFEAS(B1_Counter[14]_lut_out, GLOBAL(clock), VCC, , , , , , );


--B1_Counter[11] is int_div:inst|Counter[11] at LC_X8_Y7_N4
--operation mode is normal

B1_Counter[11]_lut_out = B1L02 & (!B1L001);
B1_Counter[11] = DFFEAS(B1_Counter[11]_lut_out, GLOBAL(clock), VCC, , , , , , );


--B1L301 is int_div:inst|reduce_nor~319 at LC_X10_Y8_N0
--operation mode is normal

B1_Counter[17]_qfbk = B1_Counter[17];
B1L301 = B1_Counter[12] # B1_Counter[17]_qfbk # !B1_Counter[14] # !B1_Counter[11];

--B1_Counter[17] is int_div:inst|Counter[17] at LC_X10_Y8_N0
--operation mode is normal

B1_Counter[17] = DFFEAS(B1L301, GLOBAL(clock), VCC, , , B1L31, , , VCC);


--B1_Counter[10] is int_div:inst|Counter[10] at LC_X10_Y8_N1
--operation mode is normal

B1_Counter[10]_lut_out = !B1L001 & B1L32;
B1_Counter[10] = DFFEAS(B1_Counter[10]_lut_out, GLOBAL(clock), VCC, , , , , , );


--B1_Counter[6] is int_div:inst|Counter[6] at LC_X10_Y8_N9
--operation mode is normal

B1_Counter[6]_lut_out = GND;
B1_Counter[6] = DFFEAS(B1_Counter[6]_lut_out, GLOBAL(clock), VCC, , , B1L13, , , VCC);


--B1L401 is int_div:inst|reduce_nor~320 at LC_X10_Y8_N6
--operation mode is normal

B1_Counter[8]_qfbk = B1_Counter[8];
B1L401 = B1_Counter[10] # !B1_Counter[8]_qfbk # !B1_Counter[7] # !B1_Counter[6];

--B1_Counter[8] is int_div:inst|Counter[8] at LC_X10_Y8_N6
--operation mode is normal

B1_Counter[8] = DFFEAS(B1L401, GLOBAL(clock), VCC, , , B1L62, , , VCC);


--B1_Counter[3] is int_div:inst|Counter[3] at LC_X12_Y8_N8
--operation mode is normal

B1_Counter[3]_lut_out = GND;
B1_Counter[3] = DFFEAS(B1_Counter[3]_lut_out, GLOBAL(clock), VCC, , , B1L04, , , VCC);


--B1_Counter[2] is int_div:inst|Counter[2] at LC_X12_Y8_N5
--operation mode is normal

B1_Counter[2]_lut_out = B1L34;
B1_Counter[2] = DFFEAS(B1_Counter[2]_lut_out, GLOBAL(clock), VCC, , , , , , );


--B1L501 is int_div:inst|reduce_nor~321 at LC_X12_Y8_N2
--operation mode is normal

B1_Counter[5]_qfbk = B1_Counter[5];
B1L501 = !B1_Counter[3] # !B1_Counter[5]_qfbk # !B1_Counter[2] # !B1_Counter[4];

--B1_Counter[5] is int_div:inst|Counter[5] at LC_X12_Y8_N2
--operation mode is normal

B1_Counter[5] = DFFEAS(B1L501, GLOBAL(clock), VCC, , , B1L43, , , VCC);


--B1_Counter[25] is int_div:inst|Counter[25] at LC_X11_Y6_N8
--operation mode is normal

B1_Counter[25]_lut_out = !B1L001 & B1L84;
B1_Counter[25] = DFFEAS(B1_Counter[25]_lut_out, GLOBAL(clock), VCC, , , , , , );


--B1L601 is int_div:inst|reduce_nor~322 at LC_X11_Y8_N0
--operation mode is normal

B1_Counter[0]_qfbk = B1_Counter[0];
B1L601 = !B1_Counter[0]_qfbk # !B1_Counter[25];

--B1_Counter[0] is int_div:inst|Counter[0] at LC_X11_Y8_N0
--operation mode is normal

B1_Counter[0] = DFFEAS(B1L601, GLOBAL(clock), VCC, , , B1L54, , , VCC);


--B1L701 is int_div:inst|reduce_nor~323 at LC_X11_Y8_N1
--operation mode is normal

B1_Counter[1]_qfbk = B1_Counter[1];
B1L701 = B1L501 # B1L401 # B1L601 # !B1_Counter[1]_qfbk;

--B1_Counter[1] is int_div:inst|Counter[1] at LC_X11_Y8_N1
--operation mode is normal

B1_Counter[1] = DFFEAS(B1L701, GLOBAL(clock), VCC, , , B1L94, , , VCC);


--B1_Counter[22] is int_div:inst|Counter[22] at LC_X10_Y7_N4
--operation mode is normal

B1_Counter[22]_lut_out = !B1L001 & (B1L25);
B1_Counter[22] = DFFEAS(B1_Counter[22]_lut_out, GLOBAL(clock), VCC, , , , , , );


--B1_Counter[19] is int_div:inst|Counter[19] at LC_X10_Y7_N2
--operation mode is normal

B1_Counter[19]_lut_out = B1L45 & !B1L001;
B1_Counter[19] = DFFEAS(B1_Counter[19]_lut_out, GLOBAL(clock), VCC, , , , , , );


--B1_Counter[18] is int_div:inst|Counter[18] at LC_X10_Y7_N0
--operation mode is normal

B1_Counter[18]_lut_out = !B1L001 & B1L75;
B1_Counter[18] = DFFEAS(B1_Counter[18]_lut_out, GLOBAL(clock), VCC, , , , , , );


--B1L801 is int_div:inst|reduce_nor~324 at LC_X10_Y7_N8
--operation mode is normal

B1_Counter[16]_qfbk = B1_Counter[16];
B1L801 = B1_Counter[19] & B1_Counter[18] & !B1_Counter[16]_qfbk & B1_Counter[22];

--B1_Counter[16] is int_div:inst|Counter[16] at LC_X10_Y7_N8
--operation mode is normal

B1_Counter[16] = DFFEAS(B1L801, GLOBAL(clock), VCC, , , B1L06, , , VCC);


--B1_Counter[13] is int_div:inst|Counter[13] at LC_X10_Y7_N1
--operation mode is normal

B1_Counter[13]_lut_out = !B1L001 & (B1L36);
B1_Counter[13] = DFFEAS(B1_Counter[13]_lut_out, GLOBAL(clock), VCC, , , , , , );


--B1_Counter[15] is int_div:inst|Counter[15] at LC_X12_Y7_N2
--operation mode is normal

B1_Counter[15]_lut_out = B1L96;
B1_Counter[15] = DFFEAS(B1_Counter[15]_lut_out, GLOBAL(clock), VCC, , , , , , );


--B1L901 is int_div:inst|reduce_nor~325 at LC_X10_Y7_N9
--operation mode is normal

B1_Counter[9]_qfbk = B1_Counter[9];
B1L901 = !B1_Counter[15] & B1L801 & B1_Counter[9]_qfbk & B1_Counter[13];

--B1_Counter[9] is int_div:inst|Counter[9] at LC_X10_Y7_N9
--operation mode is normal

B1_Counter[9] = DFFEAS(B1L901, GLOBAL(clock), VCC, , , B1L66, , , VCC);


--B1L001 is int_div:inst|reduce_nor~0 at LC_X10_Y7_N7
--operation mode is normal

B1L001 = B1L901 & !B1L301 & !B1L701 & !B1L201;


--B1L011 is int_div:inst|reduce_nor~326 at LC_X10_Y8_N3
--operation mode is normal

B1_Counter[21]_qfbk = B1_Counter[21];
B1L011 = B1_Counter[23] # B1_Counter[20] # !B1_Counter[24] # !B1_Counter[21]_qfbk;

--B1_Counter[21] is int_div:inst|Counter[21] at LC_X10_Y8_N3
--operation mode is normal

B1_Counter[21] = DFFEAS(B1L011, GLOBAL(clock), VCC, , , B1L4, , , VCC);


--B1L111 is int_div:inst|reduce_nor~327 at LC_X10_Y8_N2
--operation mode is normal

B1_Counter[12]_qfbk = B1_Counter[12];
B1L111 = B1_Counter[11] # B1_Counter[14] # !B1_Counter[17] # !B1_Counter[12]_qfbk;

--B1_Counter[12] is int_div:inst|Counter[12] at LC_X10_Y8_N2
--operation mode is normal

B1_Counter[12] = DFFEAS(B1L111, GLOBAL(clock), VCC, , , B1L51, , , VCC);


--B1L211 is int_div:inst|reduce_nor~328 at LC_X10_Y8_N5
--operation mode is normal

B1_Counter[7]_qfbk = B1_Counter[7];
B1L211 = B1_Counter[6] # B1_Counter[8] # B1_Counter[7]_qfbk # !B1_Counter[10];

--B1_Counter[7] is int_div:inst|Counter[7] at LC_X10_Y8_N5
--operation mode is normal

B1_Counter[7] = DFFEAS(B1L211, GLOBAL(clock), VCC, , , B1L92, , , VCC);


--B1L311 is int_div:inst|reduce_nor~329 at LC_X12_Y8_N6
--operation mode is normal

B1_Counter[4]_qfbk = B1_Counter[4];
B1L311 = B1_Counter[5] # B1_Counter[2] # B1_Counter[4]_qfbk # B1_Counter[3];

--B1_Counter[4] is int_div:inst|Counter[4] at LC_X12_Y8_N6
--operation mode is normal

B1_Counter[4] = DFFEAS(B1L311, GLOBAL(clock), VCC, , , B1L73, , , VCC);


--B1L411 is int_div:inst|reduce_nor~330 at LC_X10_Y8_N7
--operation mode is normal

B1L411 = B1_Counter[0] # B1_Counter[25];


--B1L511 is int_div:inst|reduce_nor~331 at LC_X10_Y8_N8
--operation mode is normal

B1L511 = B1L411 # B1L311 # B1L211 # B1_Counter[1];


--B1L101 is int_div:inst|reduce_nor~1 at LC_X10_Y8_N4
--operation mode is normal

B1L101 = !B1L111 & !B1L011 & !B1L511 & B1L901;


--B1L1 is int_div:inst|add~391 at LC_X11_Y6_N6
--operation mode is arithmetic

B1L1_carry_eqn = (!B1L35 & B1L8) # (B1L35 & B1L9);
B1L1 = B1_Counter[24] $ (!B1L1_carry_eqn);

--B1L2 is int_div:inst|add~393 at LC_X11_Y6_N6
--operation mode is arithmetic

B1L2_cout_0 = B1_Counter[24] & (!B1L8);
B1L2 = CARRY(B1L2_cout_0);

--B1L3 is int_div:inst|add~393COUT1_541 at LC_X11_Y6_N6
--operation mode is arithmetic

B1L3_cout_1 = B1_Counter[24] & (!B1L9);
B1L3 = CARRY(B1L3_cout_1);


--B1L4 is int_div:inst|add~396 at LC_X11_Y6_N3
--operation mode is arithmetic

B1L4_carry_eqn = (!B1L41 & B1L11) # (B1L41 & B1L21);
B1L4 = B1_Counter[21] $ B1L4_carry_eqn;

--B1L5 is int_div:inst|add~398 at LC_X11_Y6_N3
--operation mode is arithmetic

B1L5_cout_0 = !B1L11 # !B1_Counter[21];
B1L5 = CARRY(B1L5_cout_0);

--B1L6 is int_div:inst|add~398COUT1_539 at LC_X11_Y6_N3
--operation mode is arithmetic

B1L6_cout_1 = !B1L21 # !B1_Counter[21];
B1L6 = CARRY(B1L6_cout_1);


--B1L7 is int_div:inst|add~401 at LC_X11_Y6_N5
--operation mode is arithmetic

B1L7_carry_eqn = B1L35;
B1L7 = B1_Counter[23] $ (B1L7_carry_eqn);

--B1L8 is int_div:inst|add~403 at LC_X11_Y6_N5
--operation mode is arithmetic

B1L8_cout_0 = !B1L35 # !B1_Counter[23];
B1L8 = CARRY(B1L8_cout_0);

--B1L9 is int_div:inst|add~403COUT1_540 at LC_X11_Y6_N5
--operation mode is arithmetic

B1L9_cout_1 = !B1L35 # !B1_Counter[23];
B1L9 = CARRY(B1L9_cout_1);


--B1L01 is int_div:inst|add~406 at LC_X11_Y6_N2
--operation mode is arithmetic

B1L01_carry_eqn = (!B1L41 & B1L55) # (B1L41 & B1L65);
B1L01 = B1_Counter[20] $ !B1L01_carry_eqn;

--B1L11 is int_div:inst|add~408 at LC_X11_Y6_N2

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