📄 led_water.map.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
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-- without limitation, that your use is for the sole purpose of
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--C1_led_r[7] is ledwater:inst1|led_r[7]
--operation mode is normal
C1_led_r[7]_lut_out = C1_led_r[6] # !C1L11 & !C1_led_r[8] & !C1L21;
C1_led_r[7] = DFFEAS(C1_led_r[7]_lut_out, B1_ClockOut, VCC, , , , , , );
--C1_led_r[6] is ledwater:inst1|led_r[6]
--operation mode is normal
C1_led_r[6]_lut_out = C1_led_r[5] # !C1L11 & !C1_led_r[8] & !C1L21;
C1_led_r[6] = DFFEAS(C1_led_r[6]_lut_out, B1_ClockOut, VCC, , , , , , );
--C1_led_r[5] is ledwater:inst1|led_r[5]
--operation mode is normal
C1_led_r[5]_lut_out = C1_led_r[4] # !C1L11 & !C1_led_r[8] & !C1L21;
C1_led_r[5] = DFFEAS(C1_led_r[5]_lut_out, B1_ClockOut, VCC, , , , , , );
--C1_led_r[4] is ledwater:inst1|led_r[4]
--operation mode is normal
C1_led_r[4]_lut_out = C1_led_r[3] # !C1L11 & !C1_led_r[8] & !C1L21;
C1_led_r[4] = DFFEAS(C1_led_r[4]_lut_out, B1_ClockOut, VCC, , , , , , );
--C1_led_r[3] is ledwater:inst1|led_r[3]
--operation mode is normal
C1_led_r[3]_lut_out = C1_led_r[2] # !C1L11 & !C1_led_r[8] & !C1L21;
C1_led_r[3] = DFFEAS(C1_led_r[3]_lut_out, B1_ClockOut, VCC, , , , , , );
--C1_led_r[2] is ledwater:inst1|led_r[2]
--operation mode is normal
C1_led_r[2]_lut_out = C1_led_r[1] # !C1L11 & !C1_led_r[8] & !C1L21;
C1_led_r[2] = DFFEAS(C1_led_r[2]_lut_out, B1_ClockOut, VCC, , , , , , );
--C1_led_r[1] is ledwater:inst1|led_r[1]
--operation mode is normal
C1_led_r[1]_lut_out = C1_led_r[0] # !C1L11 & !C1_led_r[8] & !C1L21;
C1_led_r[1] = DFFEAS(C1_led_r[1]_lut_out, B1_ClockOut, VCC, , , , , , );
--C1_led_r[0] is ledwater:inst1|led_r[0]
--operation mode is normal
C1_led_r[0]_lut_out = !C1L11 & !C1_led_r[8] & !C1L21;
C1_led_r[0] = DFFEAS(C1_led_r[0]_lut_out, B1_ClockOut, VCC, , , , , , );
--C1L11 is ledwater:inst1|reduce_nor~110
--operation mode is normal
C1L11 = C1_led_r[7] # C1_led_r[6] # C1_led_r[5] # C1_led_r[4];
--C1_led_r[8] is ledwater:inst1|led_r[8]
--operation mode is normal
C1_led_r[8]_lut_out = C1_led_r[7] # !C1L11 & !C1_led_r[8] & !C1L21;
C1_led_r[8] = DFFEAS(C1_led_r[8]_lut_out, B1_ClockOut, VCC, , , , , , );
--C1L21 is ledwater:inst1|reduce_nor~111
--operation mode is normal
C1L21 = C1_led_r[3] # C1_led_r[2] # C1_led_r[1] # C1_led_r[0];
--B1_Temp1 is int_div:inst|Temp1
--operation mode is normal
B1_Temp1_lut_out = !B1_Temp1;
B1_Temp1 = DFFEAS(B1_Temp1_lut_out, clock, VCC, , B1L08, , , , );
--B1_Temp2 is int_div:inst|Temp2
--operation mode is normal
B1_Temp2_lut_out = !B1_Temp2;
B1_Temp2 = DFFEAS(B1_Temp2_lut_out, !clock, VCC, , B1L18, , , , );
--B1_ClockOut is int_div:inst|ClockOut
--operation mode is normal
B1_ClockOut = B1_Temp1 $ B1_Temp2;
--B1_Counter[24] is int_div:inst|Counter[24]
--operation mode is normal
B1_Counter[24]_lut_out = B1L1;
B1_Counter[24] = DFFEAS(B1_Counter[24]_lut_out, clock, VCC, , , , , , );
--B1_Counter[21] is int_div:inst|Counter[21]
--operation mode is normal
B1_Counter[21]_lut_out = B1L3;
B1_Counter[21] = DFFEAS(B1_Counter[21]_lut_out, clock, VCC, , , , , , );
--B1_Counter[23] is int_div:inst|Counter[23]
--operation mode is normal
B1_Counter[23]_lut_out = B1L5 & !B1L08;
B1_Counter[23] = DFFEAS(B1_Counter[23]_lut_out, clock, VCC, , , , , , );
--B1_Counter[20] is int_div:inst|Counter[20]
--operation mode is normal
B1_Counter[20]_lut_out = B1L7 & !B1L08;
B1_Counter[20] = DFFEAS(B1_Counter[20]_lut_out, clock, VCC, , , , , , );
--B1L28 is int_div:inst|reduce_nor~318
--operation mode is normal
B1L28 = B1_Counter[24] # B1_Counter[21] # !B1_Counter[20] # !B1_Counter[23];
--B1_Counter[17] is int_div:inst|Counter[17]
--operation mode is normal
B1_Counter[17]_lut_out = B1L9;
B1_Counter[17] = DFFEAS(B1_Counter[17]_lut_out, clock, VCC, , , , , , );
--B1_Counter[12] is int_div:inst|Counter[12]
--operation mode is normal
B1_Counter[12]_lut_out = B1L11;
B1_Counter[12] = DFFEAS(B1_Counter[12]_lut_out, clock, VCC, , , , , , );
--B1_Counter[14] is int_div:inst|Counter[14]
--operation mode is normal
B1_Counter[14]_lut_out = B1L31 & !B1L08;
B1_Counter[14] = DFFEAS(B1_Counter[14]_lut_out, clock, VCC, , , , , , );
--B1_Counter[11] is int_div:inst|Counter[11]
--operation mode is normal
B1_Counter[11]_lut_out = B1L51 & !B1L08;
B1_Counter[11] = DFFEAS(B1_Counter[11]_lut_out, clock, VCC, , , , , , );
--B1L38 is int_div:inst|reduce_nor~319
--operation mode is normal
B1L38 = B1_Counter[17] # B1_Counter[12] # !B1_Counter[11] # !B1_Counter[14];
--B1_Counter[10] is int_div:inst|Counter[10]
--operation mode is normal
B1_Counter[10]_lut_out = B1L71 & !B1L08;
B1_Counter[10] = DFFEAS(B1_Counter[10]_lut_out, clock, VCC, , , , , , );
--B1_Counter[8] is int_div:inst|Counter[8]
--operation mode is normal
B1_Counter[8]_lut_out = B1L91;
B1_Counter[8] = DFFEAS(B1_Counter[8]_lut_out, clock, VCC, , , , , , );
--B1_Counter[7] is int_div:inst|Counter[7]
--operation mode is normal
B1_Counter[7]_lut_out = B1L12;
B1_Counter[7] = DFFEAS(B1_Counter[7]_lut_out, clock, VCC, , , , , , );
--B1_Counter[6] is int_div:inst|Counter[6]
--operation mode is normal
B1_Counter[6]_lut_out = B1L32;
B1_Counter[6] = DFFEAS(B1_Counter[6]_lut_out, clock, VCC, , , , , , );
--B1L48 is int_div:inst|reduce_nor~320
--operation mode is normal
B1L48 = B1_Counter[10] # !B1_Counter[6] # !B1_Counter[7] # !B1_Counter[8];
--B1_Counter[5] is int_div:inst|Counter[5]
--operation mode is normal
B1_Counter[5]_lut_out = B1L52;
B1_Counter[5] = DFFEAS(B1_Counter[5]_lut_out, clock, VCC, , , , , , );
--B1_Counter[4] is int_div:inst|Counter[4]
--operation mode is normal
B1_Counter[4]_lut_out = B1L72;
B1_Counter[4] = DFFEAS(B1_Counter[4]_lut_out, clock, VCC, , , , , , );
--B1_Counter[3] is int_div:inst|Counter[3]
--operation mode is normal
B1_Counter[3]_lut_out = B1L92;
B1_Counter[3] = DFFEAS(B1_Counter[3]_lut_out, clock, VCC, , , , , , );
--B1_Counter[2] is int_div:inst|Counter[2]
--operation mode is normal
B1_Counter[2]_lut_out = B1L13;
B1_Counter[2] = DFFEAS(B1_Counter[2]_lut_out, clock, VCC, , , , , , );
--B1L58 is int_div:inst|reduce_nor~321
--operation mode is normal
B1L58 = !B1_Counter[2] # !B1_Counter[3] # !B1_Counter[4] # !B1_Counter[5];
--B1_Counter[0] is int_div:inst|Counter[0]
--operation mode is normal
B1_Counter[0]_lut_out = B1L33;
B1_Counter[0] = DFFEAS(B1_Counter[0]_lut_out, clock, VCC, , , , , , );
--B1_Counter[25] is int_div:inst|Counter[25]
--operation mode is normal
B1_Counter[25]_lut_out = B1L53 & !B1L08;
B1_Counter[25] = DFFEAS(B1_Counter[25]_lut_out, clock, VCC, , , , , , );
--B1L68 is int_div:inst|reduce_nor~322
--operation mode is normal
B1L68 = !B1_Counter[25] # !B1_Counter[0];
--B1_Counter[1] is int_div:inst|Counter[1]
--operation mode is normal
B1_Counter[1]_lut_out = B1L63;
B1_Counter[1] = DFFEAS(B1_Counter[1]_lut_out, clock, VCC, , , , , , );
--B1L78 is int_div:inst|reduce_nor~323
--operation mode is normal
B1L78 = B1L48 # B1L58 # B1L68 # !B1_Counter[1];
--B1_Counter[22] is int_div:inst|Counter[22]
--operation mode is normal
B1_Counter[22]_lut_out = B1L83 & !B1L08;
B1_Counter[22] = DFFEAS(B1_Counter[22]_lut_out, clock, VCC, , , , , , );
--B1_Counter[19] is int_div:inst|Counter[19]
--operation mode is normal
B1_Counter[19]_lut_out = B1L04 & !B1L08;
B1_Counter[19] = DFFEAS(B1_Counter[19]_lut_out, clock, VCC, , , , , , );
--B1_Counter[18] is int_div:inst|Counter[18]
--operation mode is normal
B1_Counter[18]_lut_out = B1L24 & !B1L08;
B1_Counter[18] = DFFEAS(B1_Counter[18]_lut_out, clock, VCC, , , , , , );
--B1_Counter[16] is int_div:inst|Counter[16]
--operation mode is normal
B1_Counter[16]_lut_out = B1L44;
B1_Counter[16] = DFFEAS(B1_Counter[16]_lut_out, clock, VCC, , , , , , );
--B1L88 is int_div:inst|reduce_nor~324
--operation mode is normal
B1L88 = B1_Counter[22] & B1_Counter[19] & B1_Counter[18] & !B1_Counter[16];
--B1_Counter[13] is int_div:inst|Counter[13]
--operation mode is normal
B1_Counter[13]_lut_out = B1L64 & !B1L08;
B1_Counter[13] = DFFEAS(B1_Counter[13]_lut_out, clock, VCC, , , , , , );
--B1_Counter[9] is int_div:inst|Counter[9]
--operation mode is normal
B1_Counter[9]_lut_out = B1L84;
B1_Counter[9] = DFFEAS(B1_Counter[9]_lut_out, clock, VCC, , , , , , );
--B1_Counter[15] is int_div:inst|Counter[15]
--operation mode is normal
B1_Counter[15]_lut_out = B1L05;
B1_Counter[15] = DFFEAS(B1_Counter[15]_lut_out, clock, VCC, , , , , , );
--B1L98 is int_div:inst|reduce_nor~325
--operation mode is normal
B1L98 = B1L88 & B1_Counter[13] & B1_Counter[9] & !B1_Counter[15];
--B1L08 is int_div:inst|reduce_nor~0
--operation mode is normal
B1L08 = !B1L28 & !B1L38 & !B1L78 & B1L98;
--B1L09 is int_div:inst|reduce_nor~326
--operation mode is normal
B1L09 = B1_Counter[23] # B1_Counter[20] # !B1_Counter[21] # !B1_Counter[24];
--B1L19 is int_div:inst|reduce_nor~327
--operation mode is normal
B1L19 = B1_Counter[14] # B1_Counter[11] # !B1_Counter[12] # !B1_Counter[17];
--B1L29 is int_div:inst|reduce_nor~328
--operation mode is normal
B1L29 = B1_Counter[8] # B1_Counter[7] # B1_Counter[6] # !B1_Counter[10];
--B1L39 is int_div:inst|reduce_nor~329
--operation mode is normal
B1L39 = B1_Counter[5] # B1_Counter[4] # B1_Counter[3] # B1_Counter[2];
--B1L49 is int_div:inst|reduce_nor~330
--operation mode is normal
B1L49 = B1_Counter[0] # B1_Counter[25];
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