led_water.tan.rpt

很多vhdl例程代码

; Report Minimum Timing Checks                          ; Off                ;      ;                       ;             ;
; Use Fast Timing Models                                ; Off                ;      ;                       ;             ;
; Report IO Paths Separately                            ; Off                ;      ;                       ;             ;
; Default hold multicycle                               ; Same as Multicycle ;      ;                       ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;                       ;             ;
; Cut off read during write signal paths                ; On                 ;      ;                       ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;                       ;             ;
; Report Combined Fast/Slow Timing                      ; Off                ;      ;                       ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;                       ;             ;
; Analyze latches as synchronous elements               ; Off                ;      ;                       ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;                       ;             ;
; Enable Clock Latency                                  ; Off                ;      ;                       ;             ;
; Clock Settings                                        ; clock              ;      ; clock                 ;             ;
; Clock Settings                                        ; clockout           ;      ; int_div:inst|ClockOut ;             ;
; Clock Settings                                        ; temp               ;      ; int_div:inst|Temp1    ;             ;
; Clock Settings                                        ; temp               ;      ; int_div:inst|Temp2    ;             ;
+-------------------------------------------------------+--------------------+------+-----------------------+-------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                                        ;
+-----------------------+--------------------+---------------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name       ; Clock Setting Name ; Type          ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------------+--------------------+---------------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; int_div:inst|ClockOut ; clockout           ; Internal Node ; 50.0 MHz         ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
; int_div:inst|Temp2    ; temp               ; Internal Node ; 50.0 MHz         ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
; int_div:inst|Temp1    ; temp               ; Internal Node ; 50.0 MHz         ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
; clock                 ; clock              ; User Pin      ; 50.0 MHz         ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------------+--------------------+---------------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'int_div:inst|ClockOut'                                                                                                                                                                                                              ;
+-----------+-----------------------------------------------+-------------------------+-------------------------+-----------------------+-----------------------+-----------------------------+---------------------------+-------------------------+
; Slack     ; Actual fmax (period)                          ; From                    ; To                      ; From Clock            ; To Clock              ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------+-----------------------------------------------+-------------------------+-------------------------+-----------------------+-----------------------+-----------------------------+---------------------------+-------------------------+
; 17.313 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[6] ; ledwater:inst1|led_r[3] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.426 ns                ;
; 17.321 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[6] ; ledwater:inst1|led_r[4] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.418 ns                ;
; 17.326 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[1] ; ledwater:inst1|led_r[8] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.413 ns                ;
; 17.440 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[2] ; ledwater:inst1|led_r[8] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.299 ns                ;
; 17.462 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[1] ; ledwater:inst1|led_r[2] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.277 ns                ;
; 17.463 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[1] ; ledwater:inst1|led_r[5] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.276 ns                ;
; 17.464 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[1] ; ledwater:inst1|led_r[4] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.275 ns                ;
; 17.465 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[1] ; ledwater:inst1|led_r[6] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.274 ns                ;
; 17.469 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[1] ; ledwater:inst1|led_r[0] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.270 ns                ;
; 17.472 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[1] ; ledwater:inst1|led_r[7] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.267 ns                ;
; 17.475 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[1] ; ledwater:inst1|led_r[1] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.264 ns                ;
; 17.478 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[1] ; ledwater:inst1|led_r[3] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.261 ns                ;
; 17.496 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[4] ; ledwater:inst1|led_r[3] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.243 ns                ;
; 17.504 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[4] ; ledwater:inst1|led_r[4] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.235 ns                ;
; 17.576 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[2] ; ledwater:inst1|led_r[2] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.163 ns                ;
; 17.577 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[2] ; ledwater:inst1|led_r[5] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.162 ns                ;
; 17.578 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[2] ; ledwater:inst1|led_r[4] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.161 ns                ;
; 17.579 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[2] ; ledwater:inst1|led_r[6] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.160 ns                ;
; 17.583 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[2] ; ledwater:inst1|led_r[0] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.156 ns                ;
; 17.586 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[2] ; ledwater:inst1|led_r[7] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.153 ns                ;
; 17.589 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[2] ; ledwater:inst1|led_r[1] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.150 ns                ;
; 17.592 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[2] ; ledwater:inst1|led_r[3] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.147 ns                ;
; 17.597 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[5] ; ledwater:inst1|led_r[3] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.142 ns                ;
; 17.601 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[6] ; ledwater:inst1|led_r[8] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.138 ns                ;
; 17.605 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[5] ; ledwater:inst1|led_r[4] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.134 ns                ;
; 17.615 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[0] ; ledwater:inst1|led_r[8] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 2.124 ns                ;
; 17.745 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[6] ; ledwater:inst1|led_r[1] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 1.994 ns                ;
; 17.747 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; ledwater:inst1|led_r[6] ; ledwater:inst1|led_r[7] ; int_div:inst|ClockOut ; int_div:inst|ClockOut ; 20.000 ns                   ; 19.739 ns                 ; 1.992 ns                ;