full_add.tan.summary

很多vhdl例程代码

--------------------------------------------------------------------------------------
Timing Analyzer Summary
--------------------------------------------------------------------------------------

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 11.776 ns
From           : inst2
To             : cout
From Clock     : key2
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'key3'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : inst1
To             : inst1
From Clock     : key3
To Clock       : key3
Failed Paths   : 0

Type           : Clock Setup: 'key2'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : inst2
To             : inst2
From Clock     : key2
To Clock       : key2
Failed Paths   : 0

Type           : Clock Setup: 'key1'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : inst3
To             : inst3
From Clock     : key1
To Clock       : key1
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

--------------------------------------------------------------------------------------