key_debounce.map.eqn

很多vhdl例程代码

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--G1_safe_q[0] is counter:inst3|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|safe_q[0]
--operation mode is arithmetic

G1_safe_q[0]_lut_out = !G1_safe_q[0];
G1_safe_q[0] = DFFEAS(G1_safe_q[0]_lut_out, A1L11, VCC, , , , , , );

--G1L2 is counter:inst3|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

G1L2 = CARRY(G1_safe_q[0]);


--G1_safe_q[1] is counter:inst3|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|safe_q[1]
--operation mode is arithmetic

G1_safe_q[1]_carry_eqn = G1L2;
G1_safe_q[1]_lut_out = G1_safe_q[1] $ (G1_safe_q[1]_carry_eqn);
G1_safe_q[1] = DFFEAS(G1_safe_q[1]_lut_out, A1L11, VCC, , , , , , );

--G1L4 is counter:inst3|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

G1L4 = CARRY(!G1L2 # !G1_safe_q[1]);


--G1_safe_q[2] is counter:inst3|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|safe_q[2]
--operation mode is arithmetic

G1_safe_q[2]_carry_eqn = G1L4;
G1_safe_q[2]_lut_out = G1_safe_q[2] $ (!G1_safe_q[2]_carry_eqn);
G1_safe_q[2] = DFFEAS(G1_safe_q[2]_lut_out, A1L11, VCC, , , , , , );

--G1L6 is counter:inst3|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

G1L6 = CARRY(G1_safe_q[2] & (!G1L4));


--G1_safe_q[3] is counter:inst3|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|safe_q[3]
--operation mode is normal

G1_safe_q[3]_carry_eqn = G1L6;
G1_safe_q[3]_lut_out = G1_safe_q[3] $ (G1_safe_q[3]_carry_eqn);
G1_safe_q[3] = DFFEAS(G1_safe_q[3]_lut_out, A1L11, VCC, , , , , , );


--C1L7 is decl7s:inst1|seg[6]~103
--operation mode is normal

C1L7 = G1_safe_q[0] & (G1_safe_q[3] # G1_safe_q[1] $ G1_safe_q[2]) # !G1_safe_q[0] & (G1_safe_q[1] # G1_safe_q[2] $ G1_safe_q[3]);


--C1L6 is decl7s:inst1|seg[5]~104
--operation mode is normal

C1L6 = G1_safe_q[0] & (G1_safe_q[3] $ (G1_safe_q[1] # !G1_safe_q[2])) # !G1_safe_q[0] & G1_safe_q[1] & !G1_safe_q[2] & !G1_safe_q[3];


--C1L5 is decl7s:inst1|seg[4]~105
--operation mode is normal

C1L5 = G1_safe_q[1] & G1_safe_q[0] & (!G1_safe_q[3]) # !G1_safe_q[1] & (G1_safe_q[2] & (!G1_safe_q[3]) # !G1_safe_q[2] & G1_safe_q[0]);


--C1L4 is decl7s:inst1|seg[3]~106
--operation mode is normal

C1L4 = G1_safe_q[1] & (G1_safe_q[0] & G1_safe_q[2] # !G1_safe_q[0] & !G1_safe_q[2] & G1_safe_q[3]) # !G1_safe_q[1] & !G1_safe_q[3] & (G1_safe_q[0] $ G1_safe_q[2]);


--C1L3 is decl7s:inst1|seg[2]~107
--operation mode is normal

C1L3 = G1_safe_q[2] & G1_safe_q[3] & (G1_safe_q[1] # !G1_safe_q[0]) # !G1_safe_q[2] & !G1_safe_q[0] & G1_safe_q[1] & !G1_safe_q[3];


--C1L2 is decl7s:inst1|seg[1]~108
--operation mode is normal

C1L2 = G1_safe_q[1] & (G1_safe_q[0] & (G1_safe_q[3]) # !G1_safe_q[0] & G1_safe_q[2]) # !G1_safe_q[1] & G1_safe_q[2] & (G1_safe_q[0] $ G1_safe_q[3]);


--C1L1 is decl7s:inst1|seg[0]~109
--operation mode is normal

C1L1 = G1_safe_q[2] & !G1_safe_q[1] & (G1_safe_q[0] $ !G1_safe_q[3]) # !G1_safe_q[2] & G1_safe_q[0] & (G1_safe_q[1] $ !G1_safe_q[3]);


--B1_dout3[0] is debounce:inst|dout3[0]
--operation mode is normal

B1_dout3[0]_lut_out = B1_dout2[0];
B1_dout3[0] = DFFEAS(B1_dout3[0]_lut_out, D1_ClockOut, VCC, , , , , , );


--B1_dout2[0] is debounce:inst|dout2[0]
--operation mode is normal

B1_dout2[0]_lut_out = B1_dout1[0];
B1_dout2[0] = DFFEAS(B1_dout2[0]_lut_out, D1_ClockOut, VCC, , , , , , );


--B1_dout1[0] is debounce:inst|dout1[0]
--operation mode is normal

B1_dout1[0]_lut_out = key1;
B1_dout1[0] = DFFEAS(B1_dout1[0]_lut_out, D1_ClockOut, VCC, , , , , , );


--A1L11 is inst5~29
--operation mode is normal

A1L11 = key2 & (B1_dout3[0] # B1_dout2[0] # B1_dout1[0]);


--D1_Temp1 is int_div:inst2|Temp1
--operation mode is normal

D1_Temp1_lut_out = !D1_Temp1;
D1_Temp1 = DFFEAS(D1_Temp1_lut_out, clock_48M, VCC, , D1L65, , , , );


--D1_Temp2 is int_div:inst2|Temp2
--operation mode is normal

D1_Temp2_lut_out = !D1_Temp2;
D1_Temp2 = DFFEAS(D1_Temp2_lut_out, !clock_48M, VCC, , D1L75, , , , );


--D1_ClockOut is int_div:inst2|ClockOut
--operation mode is normal

D1_ClockOut = D1_Temp1 $ D1_Temp2;


--D1_Counter[14] is int_div:inst2|Counter[14]
--operation mode is normal

D1_Counter[14]_lut_out = D1L1;
D1_Counter[14] = DFFEAS(D1_Counter[14]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[12] is int_div:inst2|Counter[12]
--operation mode is normal

D1_Counter[12]_lut_out = D1L3;
D1_Counter[12] = DFFEAS(D1_Counter[12]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[13] is int_div:inst2|Counter[13]
--operation mode is normal

D1_Counter[13]_lut_out = D1L5 & (D1L26 # !D1_Counter[17] # !D1_Counter[0]);
D1_Counter[13] = DFFEAS(D1_Counter[13]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[11] is int_div:inst2|Counter[11]
--operation mode is normal

D1_Counter[11]_lut_out = D1L7 & (D1L26 # !D1_Counter[17] # !D1_Counter[0]);
D1_Counter[11] = DFFEAS(D1_Counter[11]_lut_out, clock_48M, VCC, , , , , , );


--D1L85 is int_div:inst2|reduce_nor~237
--operation mode is normal

D1L85 = D1_Counter[14] # D1_Counter[12] # !D1_Counter[11] # !D1_Counter[13];


--D1_Counter[10] is int_div:inst2|Counter[10]
--operation mode is normal

D1_Counter[10]_lut_out = D1L9;
D1_Counter[10] = DFFEAS(D1_Counter[10]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[7] is int_div:inst2|Counter[7]
--operation mode is normal

D1_Counter[7]_lut_out = D1L11 & (D1L26 # !D1_Counter[17] # !D1_Counter[0]);
D1_Counter[7] = DFFEAS(D1_Counter[7]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[8] is int_div:inst2|Counter[8]
--operation mode is normal

D1_Counter[8]_lut_out = D1L31 & (D1L26 # !D1_Counter[17] # !D1_Counter[0]);
D1_Counter[8] = DFFEAS(D1_Counter[8]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[5] is int_div:inst2|Counter[5]
--operation mode is normal

D1_Counter[5]_lut_out = D1L51;
D1_Counter[5] = DFFEAS(D1_Counter[5]_lut_out, clock_48M, VCC, , , , , , );


--D1L95 is int_div:inst2|reduce_nor~238
--operation mode is normal

D1L95 = D1_Counter[10] # D1_Counter[7] # !D1_Counter[5] # !D1_Counter[8];


--D1_Counter[4] is int_div:inst2|Counter[4]
--operation mode is normal

D1_Counter[4]_lut_out = D1L71;
D1_Counter[4] = DFFEAS(D1_Counter[4]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[3] is int_div:inst2|Counter[3]
--operation mode is normal

D1_Counter[3]_lut_out = D1L91;
D1_Counter[3] = DFFEAS(D1_Counter[3]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[2] is int_div:inst2|Counter[2]
--operation mode is normal

D1_Counter[2]_lut_out = D1L12;
D1_Counter[2] = DFFEAS(D1_Counter[2]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[1] is int_div:inst2|Counter[1]
--operation mode is normal

D1_Counter[1]_lut_out = D1L32;
D1_Counter[1] = DFFEAS(D1_Counter[1]_lut_out, clock_48M, VCC, , , , , , );


--D1L06 is int_div:inst2|reduce_nor~239
--operation mode is normal

D1L06 = !D1_Counter[1] # !D1_Counter[2] # !D1_Counter[3] # !D1_Counter[4];


--D1_Counter[16] is int_div:inst2|Counter[16]
--operation mode is normal

D1_Counter[16]_lut_out = D1L52 & (D1L26 # !D1_Counter[17] # !D1_Counter[0]);
D1_Counter[16] = DFFEAS(D1_Counter[16]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[15] is int_div:inst2|Counter[15]
--operation mode is normal

D1_Counter[15]_lut_out = D1L72 & (D1L26 # !D1_Counter[17] # !D1_Counter[0]);
D1_Counter[15] = DFFEAS(D1_Counter[15]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[6] is int_div:inst2|Counter[6]
--operation mode is normal

D1_Counter[6]_lut_out = D1L92;
D1_Counter[6] = DFFEAS(D1_Counter[6]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[9] is int_div:inst2|Counter[9]
--operation mode is normal

D1_Counter[9]_lut_out = D1L13;
D1_Counter[9] = DFFEAS(D1_Counter[9]_lut_out, clock_48M, VCC, , , , , , );


--D1L16 is int_div:inst2|reduce_nor~240
--operation mode is normal

D1L16 = D1_Counter[16] & D1_Counter[15] & D1_Counter[6] & !D1_Counter[9];


--D1L26 is int_div:inst2|reduce_nor~241
--operation mode is normal

D1L26 = D1L85 # D1L95 # D1L06 # !D1L16;


--D1_Counter[0] is int_div:inst2|Counter[0]
--operation mode is normal

D1_Counter[0]_lut_out = D1L33;
D1_Counter[0] = DFFEAS(D1_Counter[0]_lut_out, clock_48M, VCC, , , , , , );


--D1_Counter[17] is int_div:inst2|Counter[17]
--operation mode is normal

D1_Counter[17]_lut_out = D1L53 & (D1L26 # !D1_Counter[17] # !D1_Counter[0]);
D1_Counter[17] = DFFEAS(D1_Counter[17]_lut_out, clock_48M, VCC, , , , , , );


--D1L65 is int_div:inst2|reduce_nor~0
--operation mode is normal

D1L65 = !D1L26 & (D1_Counter[0] & D1_Counter[17]);


--D1L36 is int_div:inst2|reduce_nor~242
--operation mode is normal

D1L36 = D1_Counter[13] # D1_Counter[11] # !D1_Counter[12] # !D1_Counter[14];


--D1L46 is int_div:inst2|reduce_nor~243
--operation mode is normal

D1L46 = D1_Counter[8] # D1_Counter[5] # !D1_Counter[7] # !D1_Counter[10];


--D1L56 is int_div:inst2|reduce_nor~244
--operation mode is normal

D1L56 = D1_Counter[4] # D1_Counter[3] # D1_Counter[2] # D1_Counter[1];


--D1L66 is int_div:inst2|reduce_nor~245
--operation mode is normal

D1L66 = D1L36 # D1L46 # D1L56 # !D1L16;