📄 key_debounce.map.rpt
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; -- Total 1-input functions ; 22 ;
; -- Total 0-input functions ; 0 ;
; Combinational cells for routing ; 0 ;
; Total registers ; 27 ;
; Total logic cells in carry chains ; 22 ;
; I/O pins ; 19 ;
; Maximum fan-out node ; clock_48M ;
; Maximum fan-out ; 20 ;
; Total fan-out ; 198 ;
; Average fan-out ; 2.36 ;
+-----------------------------------+-----------+
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+-------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+---------------------------------------------------------------------------------------+
; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Full Hierarchy Name ;
+-------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+---------------------------------------------------------------------------------------+
; |key_debounce ; 65 (1) ; 27 ; 0 ; 19 ; 0 ; 38 (1) ; 16 (0) ; 11 (0) ; 22 (0) ; |key_debounce ;
; |counter:inst3| ; 4 (0) ; 4 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (0) ; 4 (0) ; |key_debounce|counter:inst3 ;
; |lpm_counter:lpm_counter_component| ; 4 (0) ; 4 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (0) ; 4 (0) ; |key_debounce|counter:inst3|lpm_counter:lpm_counter_component ;
; |cntr_cs6:auto_generated| ; 4 (4) ; 4 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (4) ; 4 (4) ; |key_debounce|counter:inst3|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated ;
; |debounce:inst| ; 3 (3) ; 3 ; 0 ; 0 ; 0 ; 0 (0) ; 3 (3) ; 0 (0) ; 0 (0) ; |key_debounce|debounce:inst ;
; |decl7s:inst1| ; 7 (7) ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 0 (0) ; 0 (0) ; 0 (0) ; |key_debounce|decl7s:inst1 ;
; |int_div:inst2| ; 50 (50) ; 20 ; 0 ; 0 ; 0 ; 30 (30) ; 13 (13) ; 7 (7) ; 18 (18) ; |key_debounce|int_div:inst2 ;
+-------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+---------------------------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 27 ;
; Number of registers using Synchronous Clear ; 0 ;
; Number of registers using Synchronous Load ; 0 ;
; Number of registers using Asynchronous Clear ; 0 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 2 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+----------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: counter:inst3|lpm_counter:lpm_counter_component ;
+------------------------+----------+----------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------+----------+----------------------------------------------------------+
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; LPM_WIDTH ; 4 ; Integer ;
; LPM_DIRECTION ; UP ; Untyped ;
; LPM_MODULUS ; 0 ; Untyped ;
; LPM_AVALUE ; UNUSED ; Untyped ;
; LPM_SVALUE ; UNUSED ; Untyped ;
; DEVICE_FAMILY ; Cyclone ; Untyped ;
; CARRY_CHAIN ; MANUAL ; Untyped ;
; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
; CARRY_CNT_EN ; SMART ; Untyped ;
; LABWIDE_SCLR ; ON ; Untyped ;
; USE_NEW_VERSION ; TRUE ; Untyped ;
; CBXI_PARAMETER ; cntr_cs6 ; Untyped ;
+------------------------+----------+----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------+
; Parameter Settings for User Entity Instance: debounce:inst ;
+----------------+-------+-----------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-----------------------------------+
; key_width ; 1 ; Untyped ;
+----------------+-------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------+
; Parameter Settings for User Entity Instance: int_div:inst2 ;
+----------------+--------+----------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+--------+----------------------------------+
; n ; 240000 ; Untyped ;
+----------------+--------+----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in E:/VHDL_soft/EDA/Example_VHDL/QuickSOPC_1C6/ep1c6_6_key_debounce/key_debounce.map.eqn.
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 5.0 Build 168 06/22/2005 Service Pack 1.04 SJ Full Version
Info: Processing started: Wed Sep 20 09:05:00 2006
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off key_debounce -c key_debounce
Info: Found 2 design units, including 1 entities, in source file decl7s.vhd
Info: Found design unit 1: decl7s-ONE
Info: Found entity 1: decl7s
Info: Found 2 design units, including 1 entities, in source file int_div.vhd
Info: Found design unit 1: int_div-Devider
Info: Found entity 1: int_div
Info: Found 2 design units, including 1 entities, in source file debounce.vhd
Info: Found design unit 1: debounce-one
Info: Found entity 1: debounce
Info: Found 1 design units, including 1 entities, in source file key_debounce.bdf
Info: Found entity 1: key_debounce
Info: Elaborating entity "key_debounce" for the top level hierarchy
Info: Elaborating entity "decl7s" for hierarchy "decl7s:inst1"
Info: VHDL Case Statement information at decl7s.vhd(58): OTHERS choice is never selected
Info: Using design file counter.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
Info: Found design unit 1: counter-SYN
Info: Found entity 1: counter
Info: Elaborating entity "counter" for hierarchy "counter:inst3"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf
Info: Found entity 1: lpm_counter
Info: Elaborating entity "lpm_counter" for hierarchy "counter:inst3|lpm_counter:lpm_counter_component"
Info: Found 1 design units, including 1 entities, in source file db/cntr_cs6.tdf
Info: Found entity 1: cntr_cs6
Info: Elaborating entity "cntr_cs6" for hierarchy "counter:inst3|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated"
Info: Elaborating entity "debounce" for hierarchy "debounce:inst"
Info: Elaborating entity "int_div" for hierarchy "int_div:inst2"
Warning: Output pins are stuck at VCC or GND
Warning: Pin "dig[7]" stuck at GND
Warning: Pin "dig[6]" stuck at GND
Warning: Pin "dig[5]" stuck at GND
Warning: Pin "dig[4]" stuck at GND
Warning: Pin "dig[3]" stuck at GND
Warning: Pin "dig[2]" stuck at GND
Warning: Pin "dig[1]" stuck at GND
Warning: Pin "dig[0]" stuck at GND
Warning: Pin "seg[7]" stuck at VCC
Info: Implemented 84 device resources after synthesis - the final resource count might be different
Info: Implemented 3 input pins
Info: Implemented 16 output pins
Info: Implemented 65 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 10 warnings
Info: Processing ended: Wed Sep 20 09:05:03 2006
Info: Elapsed time: 00:00:04
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