gate.fit

基于FLEX10K的频率计设计

-- MAX+plus II Compiler Fit File      
-- Version 10.0 9/14/2000             
-- Compiled: 06/19/2007 22:07:19      

-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "gate"
BEGIN

    DEVICE = "EP1K10TC100-1";

    "CLK"                          : INPUT_PIN  = 39     ;
    "GRSET0"                       : OUTPUT_PIN = 10     ;
    "GRSET1"                       : OUTPUT_PIN = 6      ;
    "GRSET2"                       : OUTPUT_PIN = 8      ;
    "GRSET3"                       : OUTPUT_PIN = 7      ;
    ":9"                           : LOCATION   = LC3_A24;  -- REG3
    ":10"                          : LOCATION   = LC5_A24;  -- REG2
    ":11"                          : LOCATION   = LC2_A24;  -- REG1
    ":12"                          : LOCATION   = LC8_A24;  -- REG0

END;

INTERNAL_INFO "gate"
BEGIN
	DEVICE = EP1K10TC100-1;
    OD5P39  : LORAX = "1:FB5->LC3_A24,->LC5_A24,->LC2_A24,->LC8_A24|";
    LC3_A24 : LORAX = "1:MSW2R0C23,HHR15R0->OH2R0P7|";
    LC5_A24 : LORAX = "1:MSW4R0C23,HHR30R0->OH4R0P8|";
    LC2_A24 : LORAX = "1:MSW1R0C23,G20R0->OH1R0P6|";
    LC8_A24 : LORAX = "1:MSW7R0C23,HHR47R0->OH7R0P10|";
	LC3_A24 : LORAX2 = "X, X, X, LC8_A24";
	LC5_A24 : LORAX2 = "X, X, X, LC3_A24";
	LC2_A24 : LORAX2 = "X, X, X, LC5_A24";
	LC8_A24 : LORAX2 = "X, X, X, LC2_A24";
END;