📄 sram.fit.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.1 Build 201 11/27/2006 SJ Web Edition " "Info: Version 6.1 Build 201 11/27/2006 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Mar 04 10:04:30 2007 " "Info: Processing started: Sun Mar 04 10:04:30 2007" { } { } 0 0 "Processing started: %1!s!" 0 0} } { } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off sram -c sram " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off sram -c sram" { } { } 0 0 "Command: %1!s!" 0 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "sram EP1C12Q240C8 " "Info: Selected device EP1C12Q240C8 for design \"sram\"" { } { } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0}
{ "Info" "IFITCC_FITCC_QID_PARTITION_BACK_ANNOTATION_TOP" "1 0 " "Info: The Fitter has identified 1 logical partitions of which 0 have a previous placement to use" { { "Info" "IFITCC_FITCC_QID_PARTITION_BACK_ANNOTATION_NONE_OVERRIDE" "264 Top " "Info: Previous placement does not exist for 264 of 264 atoms in partition Top" { } { } 0 0 "Previous placement does not exist for %1!d! of %1!d! atoms in partition %2!s!" 0 0} } { } 0 0 "The Fitter has identified %1!d! logical partitions of which %2!d! have a previous placement to use" 0 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1C6Q240C8 " "Info: Device EP1C6Q240C8 is compatible" { } { } 2 0 "Device %1!s! is compatible" 0 0} } { } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "2 " "Info: Fitter converted 2 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~nCSO~ 24 " "Info: Pin ~nCSO~ is reserved at location 24" { } { } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ASDO~ 37 " "Info: Pin ~ASDO~ is reserved at location 37" { } { } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0} } { } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0}
{ "Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "23 23 " "Warning: No exact pin location assignment(s) for 23 pins of 23 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "dout\[0\] " "Info: Pin dout\[0\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 16 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[0] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[0] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "dout\[1\] " "Info: Pin dout\[1\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 16 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[1] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[1] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "dout\[2\] " "Info: Pin dout\[2\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 16 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[2] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[2] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "dout\[3\] " "Info: Pin dout\[3\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 16 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[3] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[3] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "dout\[4\] " "Info: Pin dout\[4\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 16 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[4] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[4] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "dout\[5\] " "Info: Pin dout\[5\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 16 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[5] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[5] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "dout\[6\] " "Info: Pin dout\[6\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 16 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[6] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[6] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "dout\[7\] " "Info: Pin dout\[7\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 16 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[7] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { dout[7] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "adr\[1\] " "Info: Pin adr\[1\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 14 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { adr[1] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { adr[1] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "adr\[0\] " "Info: Pin adr\[0\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 14 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { adr[0] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { adr[0] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "adr\[3\] " "Info: Pin adr\[3\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 14 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { adr[3] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { adr[3] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "adr\[2\] " "Info: Pin adr\[2\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 14 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { adr[2] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { adr[2] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wr " "Info: Pin wr not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 13 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { wr } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { wr } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "rd " "Info: Pin rd not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 13 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { rd } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { rd } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "cs " "Info: Pin cs not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 13 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { cs } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { cs } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "din\[0\] " "Info: Pin din\[0\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 15 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[0] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[0] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "din\[1\] " "Info: Pin din\[1\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 15 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[1] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[1] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "din\[2\] " "Info: Pin din\[2\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 15 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[2] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[2] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "din\[3\] " "Info: Pin din\[3\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 15 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[3] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[3] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "din\[4\] " "Info: Pin din\[4\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 15 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[4] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[4] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "din\[5\] " "Info: Pin din\[5\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 15 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[5] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[5] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "din\[6\] " "Info: Pin din\[6\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 15 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[6] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[6] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "din\[7\] " "Info: Pin din\[7\] not assigned to an exact location on the device" { } { { "sram.vhd" "" { Text "L:/EDA技术资料/模块程序（便于调用）/静态随机存储器(SRAM)设计/sram.vhd" 15 -1 0 } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[7] } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { din[7] } "NODE_NAME" } } } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} } { } 0 0 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0}
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Fitter is using the Classic Timing Analyzer" { } { } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0}
{ "Info" "ITAN_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." { } { } 0 0 "Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." 0 0}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" { } { } 1 0 "Performing register packing on registers with non-logic cell location assignments" 0 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" { } { } 1 0 "Completed register packing on registers with non-logic cell location assignments" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" { } { } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources" { } { } 0 0 "DQS I/O pins require %1!d! global routing resources" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "rtl~0 Global clock " "Info: Automatically promoted signal \"rtl~0\" to use Global clock" { } { { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { rtl~0 } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { rtl~0 } "NODE_NAME" } } } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "rtl~1 Global clock " "Info: Automatically promoted signal \"rtl~1\" to use Global clock" { } { { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { rtl~1 } "NODE_NAME" } } { "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { rtl~1 } "NODE_NAME" } } } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
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