control8080.vo

EPM1270和单片机的8080通讯接口

// synopsys translate_off
defparam \comb_4|commod[3]~I .lut_mask = "AAC0";
defparam \comb_4|commod[3]~I .operation_mode = "normal";
defparam \comb_4|commod[3]~I .output_mode = "reg_only";
defparam \comb_4|commod[3]~I .register_cascade_mode = "off";
defparam \comb_4|commod[3]~I .sum_lutc_input = "datac";
defparam \comb_4|commod[3]~I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X15_Y8_N7
maxii_lcell \comb_4|ram_write_o[5]~460_I (
// Equation(s):
// \comb_4|ram_write_o[5]~460  = \RS~combout  & (!\comb_4|commod [3])

	.clk(gnd),
	.dataa(\RS~combout ),
	.datab(vcc),
	.datac(vcc),
	.datad(\comb_4|commod [3]),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|ram_write_o[5]~460 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|ram_write_o[5]~460_I .lut_mask = "00AA";
defparam \comb_4|ram_write_o[5]~460_I .operation_mode = "normal";
defparam \comb_4|ram_write_o[5]~460_I .output_mode = "comb_only";
defparam \comb_4|ram_write_o[5]~460_I .register_cascade_mode = "off";
defparam \comb_4|ram_write_o[5]~460_I .sum_lutc_input = "datac";
defparam \comb_4|ram_write_o[5]~460_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X14_Y8_N0
maxii_lcell \comb_4|en0~I (
// Equation(s):
// \comb_4|Selector0~136  = \RW~combout  & !\comb_4|en1  & B1_en0 & \comb_4|ram_write_o[5]~460 
// \comb_4|en0  = DFFEAS(\comb_4|Selector0~136 , GLOBAL(\clk~combout ), VCC, , \rst~combout , \EN~combout , , , VCC)

	.clk(\clk~combout ),
	.dataa(\RW~combout ),
	.datab(\comb_4|en1 ),
	.datac(\EN~combout ),
	.datad(\comb_4|ram_write_o[5]~460 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(vcc),
	.ena(\rst~combout ),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|Selector0~136 ),
	.regout(\comb_4|en0 ),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|en0~I .lut_mask = "2000";
defparam \comb_4|en0~I .operation_mode = "normal";
defparam \comb_4|en0~I .output_mode = "reg_and_comb";
defparam \comb_4|en0~I .register_cascade_mode = "off";
defparam \comb_4|en0~I .sum_lutc_input = "qfbk";
defparam \comb_4|en0~I .synch_mode = "on";
// synopsys translate_on

// atom is at LC_X16_Y6_N8
maxii_lcell \comb_4|write~I (
// Equation(s):
// \comb_4|write  = DFFEAS(\comb_4|en1  & \comb_4|write  & (\comb_4|en0 ) # !\comb_4|en1  & (\comb_4|write  # !\RW~combout  & \comb_4|en0 ), GLOBAL(\clk~combout ), VCC, , , , , !\rst~combout , )

	.clk(\clk~combout ),
	.dataa(\comb_4|en1 ),
	.datab(\comb_4|write ),
	.datac(\RW~combout ),
	.datad(\comb_4|en0 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(!\rst~combout ),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\comb_4|write ),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|write~I .lut_mask = "CD44";
defparam \comb_4|write~I .operation_mode = "normal";
defparam \comb_4|write~I .output_mode = "reg_only";
defparam \comb_4|write~I .register_cascade_mode = "off";
defparam \comb_4|write~I .sum_lutc_input = "datac";
defparam \comb_4|write~I .synch_mode = "on";
// synopsys translate_on

// atom is at LC_X15_Y6_N2
maxii_lcell \comb_4|data_in[0]~I (
// Equation(s):
// \comb_4|data_in [0] = GLOBAL(\comb_4|write ) & \data[0]~7  # !GLOBAL(\comb_4|write ) & (\comb_4|data_in [0])

	.clk(gnd),
	.dataa(\data[0]~7 ),
	.datab(vcc),
	.datac(\comb_4|write ),
	.datad(\comb_4|data_in [0]),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|data_in [0]),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|data_in[0]~I .lut_mask = "AFA0";
defparam \comb_4|data_in[0]~I .operation_mode = "normal";
defparam \comb_4|data_in[0]~I .output_mode = "comb_only";
defparam \comb_4|data_in[0]~I .register_cascade_mode = "off";
defparam \comb_4|data_in[0]~I .sum_lutc_input = "datac";
defparam \comb_4|data_in[0]~I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X16_Y7_N2
maxii_lcell \comb_4|ram_write_o[5]~469_I (
// Equation(s):
// \comb_4|ram_write_o[5]~469  = !\RW~combout  & !\comb_4|commod [3] & \RS~combout  & \comb_4|always1~95 

	.clk(gnd),
	.dataa(\RW~combout ),
	.datab(\comb_4|commod [3]),
	.datac(\RS~combout ),
	.datad(\comb_4|always1~95 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|ram_write_o[5]~469 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|ram_write_o[5]~469_I .lut_mask = "1000";
defparam \comb_4|ram_write_o[5]~469_I .operation_mode = "normal";
defparam \comb_4|ram_write_o[5]~469_I .output_mode = "comb_only";
defparam \comb_4|ram_write_o[5]~469_I .register_cascade_mode = "off";
defparam \comb_4|ram_write_o[5]~469_I .sum_lutc_input = "datac";
defparam \comb_4|ram_write_o[5]~469_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X16_Y6_N0
maxii_lcell \comb_4|cmd_read[6]~671_I (
// Equation(s):
// \comb_4|cmd_read[6]~671  = !\comb_4|commod [2] & (!\comb_4|commod [1] & !\comb_4|commod [0])

	.clk(gnd),
	.dataa(\comb_4|commod [2]),
	.datab(vcc),
	.datac(\comb_4|commod [1]),
	.datad(\comb_4|commod [0]),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|cmd_read[6]~671 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|cmd_read[6]~671_I .lut_mask = "0005";
defparam \comb_4|cmd_read[6]~671_I .operation_mode = "normal";
defparam \comb_4|cmd_read[6]~671_I .output_mode = "comb_only";
defparam \comb_4|cmd_read[6]~671_I .register_cascade_mode = "off";
defparam \comb_4|cmd_read[6]~671_I .sum_lutc_input = "datac";
defparam \comb_4|cmd_read[6]~671_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X16_Y7_N6
maxii_lcell \comb_4|ram_write_o[5]~461_I (
// Equation(s):
// \comb_4|ram_write_o[5]~461  = \comb_4|ram_write_o[5]~469  & \comb_4|cmd_read[6]~671  # !\rst~combout 

	.clk(gnd),
	.dataa(vcc),
	.datab(\comb_4|ram_write_o[5]~469 ),
	.datac(\comb_4|cmd_read[6]~671 ),
	.datad(\rst~combout ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|ram_write_o[5]~461 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|ram_write_o[5]~461_I .lut_mask = "C0FF";
defparam \comb_4|ram_write_o[5]~461_I .operation_mode = "normal";
defparam \comb_4|ram_write_o[5]~461_I .output_mode = "comb_only";
defparam \comb_4|ram_write_o[5]~461_I .register_cascade_mode = "off";
defparam \comb_4|ram_write_o[5]~461_I .sum_lutc_input = "datac";
defparam \comb_4|ram_write_o[5]~461_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X15_Y6_N8
maxii_lcell \comb_4|ram_write_o[0]~I (
// Equation(s):
// \comb_4|ram_write_o~459  = \rst~combout  & (\comb_4|data_in [0])
// \comb_4|ram_write_o [0] = DFFEAS(\comb_4|ram_write_o~459 , GLOBAL(\clk~combout ), VCC, , \comb_4|ram_write_o[5]~461 , , , , )

	.clk(\clk~combout ),
	.dataa(\rst~combout ),
	.datab(vcc),
	.datac(vcc),
	.datad(\comb_4|data_in [0]),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\comb_4|ram_write_o[5]~461 ),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|ram_write_o~459 ),
	.regout(\comb_4|ram_write_o [0]),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|ram_write_o[0]~I .lut_mask = "AA00";
defparam \comb_4|ram_write_o[0]~I .operation_mode = "normal";
defparam \comb_4|ram_write_o[0]~I .output_mode = "reg_and_comb";
defparam \comb_4|ram_write_o[0]~I .register_cascade_mode = "off";
defparam \comb_4|ram_write_o[0]~I .sum_lutc_input = "datac";
defparam \comb_4|ram_write_o[0]~I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X15_Y8_N2
maxii_lcell \comb_4|ram_addr_o[3]~383_I (
// Equation(s):
// \comb_4|ram_addr_o[3]~383  = \comb_4|always1~95  & \comb_4|ram_write_o[5]~460  & !\RW~combout  & !\comb_4|commod [1]

	.clk(gnd),
	.dataa(\comb_4|always1~95 ),
	.datab(\comb_4|ram_write_o[5]~460 ),
	.datac(\RW~combout ),
	.datad(\comb_4|commod [1]),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|ram_addr_o[3]~383 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|ram_addr_o[3]~383_I .lut_mask = "0008";
defparam \comb_4|ram_addr_o[3]~383_I .operation_mode = "normal";
defparam \comb_4|ram_addr_o[3]~383_I .output_mode = "comb_only";
defparam \comb_4|ram_addr_o[3]~383_I .register_cascade_mode = "off";
defparam \comb_4|ram_addr_o[3]~383_I .sum_lutc_input = "datac";
defparam \comb_4|ram_addr_o[3]~383_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X15_Y8_N8
maxii_lcell \comb_4|ram_addr_o[3]~384_I (
// Equation(s):
// \comb_4|ram_addr_o[3]~384  = \comb_4|commod [0] & !\comb_4|commod [2] & \comb_4|ram_addr_o[3]~383  # !\rst~combout 

	.clk(gnd),
	.dataa(\rst~combout ),
	.datab(\comb_4|commod [0]),
	.datac(\comb_4|commod [2]),
	.datad(\comb_4|ram_addr_o[3]~383 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|ram_addr_o[3]~384 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|ram_addr_o[3]~384_I .lut_mask = "5D55";
defparam \comb_4|ram_addr_o[3]~384_I .operation_mode = "normal";
defparam \comb_4|ram_addr_o[3]~384_I .output_mode = "comb_only";
defparam \comb_4|ram_addr_o[3]~384_I .register_cascade_mode = "off";
defparam \comb_4|ram_addr_o[3]~384_I .sum_lutc_input = "datac";
defparam \comb_4|ram_addr_o[3]~384_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X15_Y8_N6
maxii_lcell \comb_4|ram_addr_o[1]~I (
// Equation(s):
// \comb_4|ram_write_o~462  = \rst~combout  & (\comb_4|data_in [1])
// \comb_4|ram_addr_o [1] = DFFEAS(\comb_4|ram_write_o~462 , GLOBAL(\clk~combout ), VCC, , \comb_4|ram_addr_o[3]~384 , , , , )

	.clk(\clk~combout ),
	.dataa(vcc),
	.datab(\rst~combout ),
	.datac(vcc),
	.datad(\comb_4|data_in [1]),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\comb_4|ram_addr_o[3]~384 ),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|ram_write_o~462 ),
	.regout(\comb_4|ram_addr_o [1]),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|ram_addr_o[1]~I .lut_mask = "CC00";
defparam \comb_4|ram_addr_o[1]~I .operation_mode = "normal";
defparam \comb_4|ram_addr_o[1]~I .output_mode = "reg_and_comb";
defparam \comb_4|ram_addr_o[1]~I .register_cascade_mode = "off";
defparam \comb_4|ram_addr_o[1]~I .sum_lutc_input = "datac";
defparam \comb_4|ram_addr_o[1]~I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X16_Y7_N3
maxii_lcell \comb_4|cmd_reg1[0]~772_I (
// Equation(s):
// \comb_4|cmd_reg1[0]~772  = \comb_4|commod [1] & !\comb_4|commod [2] & (\comb_4|ram_write_o[5]~469 )

	.clk(gnd),
	.dataa(\comb_4|commod [1]),
	.datab(\comb_4|commod [2]),
	.datac(vcc),
	.datad(\comb_4|ram_write_o[5]~469 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|cmd_reg1[0]~772 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|cmd_reg1[0]~772_I .lut_mask = "2200";
defparam \comb_4|cmd_reg1[0]~772_I .operation_mode = "normal";
defparam \comb_4|cmd_reg1[0]~772_I .output_mode = "comb_only";
defparam \comb_4|cmd_reg1[0]~772_I .register_cascade_mode = "off";
defparam \comb_4|cmd_reg1[0]~772_I .sum_lutc_input = "datac";
defparam \comb_4|cmd_reg1[0]~772_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X16_Y7_N5
maxii_lcell \comb_4|cmd_reg2[5]~762_I (
// Equation(s):
// \comb_4|cmd_reg2[5]~762  = \comb_4|commod [0] & \comb_4|cmd_reg1[0]~772  # !\rst~combout 

	.clk(gnd),
	.dataa(\comb_4|commod [0]),
	.datab(vcc),
	.datac(\rst~combout ),
	.datad(\comb_4|cmd_reg1[0]~772 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),