jtd.map.eqn

交通灯VHDL设计

-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--A1L4Q is bcd1[0]~reg0
--operation mode is normal

A1L4Q_lut_out = !A1L4Q & (A1L13Q # A1L10Q # A1L7Q);
A1L4Q = DFFEA(A1L4Q_lut_out, clk, !E5, , , , );

--A1L3Q is bcd1[0]~68
--operation mode is normal

A1L3Q = A1L4Q;


--A1L7Q is bcd1[1]~reg0
--operation mode is normal

A1L7Q_lut_out = A1L4Q & (A1L7Q) # !A1L4Q & !A1L7Q & (A1L13Q # A1L10Q);
A1L7Q = DFFEA(A1L7Q_lut_out, clk, !E5, , , , );

--A1L6Q is bcd1[1]~69
--operation mode is normal

A1L6Q = A1L7Q;


--A1L10Q is bcd1[2]~reg0
--operation mode is normal

A1L10Q_lut_out = A1L10Q $ (!A1L4Q & !A1L7Q);
A1L10Q = DFFEA(A1L10Q_lut_out, clk, !E5, , , , );

--A1L9Q is bcd1[2]~70
--operation mode is normal

A1L9Q = A1L10Q;


--A1L13Q is bcd1[3]~reg0
--operation mode is normal

A1L13Q_lut_out = A1L13Q & (A1L10Q # A1L4Q # A1L7Q);
A1L13Q = DFFEA(A1L13Q_lut_out, clk, !E5, , , , );

--A1L12Q is bcd1[3]~71
--operation mode is normal

A1L12Q = A1L13Q;


--co_1 is co_1
--operation mode is normal

co_1_lut_out = A1L25 # co_1 & (!A1L24);
co_1 = DFFEA(co_1_lut_out, clk, !E5, , , , );

--A1L22Q is co_1~41
--operation mode is normal

A1L22Q = co_1;


--A1L25 is rtl~47
--operation mode is normal

A1L25 = A1L4Q & !A1L7Q & !A1L10Q & !A1L13Q;

--A1L26 is rtl~48
--operation mode is normal

A1L26 = A1L4Q & !A1L7Q & !A1L10Q & !A1L13Q;


--A1L24 is rtl~0
--operation mode is normal

A1L24 = !A1L13Q & !A1L10Q & !A1L4Q & !A1L7Q;

--A1L27 is rtl~49
--operation mode is normal

A1L27 = !A1L13Q & !A1L10Q & !A1L4Q & !A1L7Q;


--clk is clk
--operation mode is input

clk = INPUT();


--E5 is E5
--operation mode is input

E5 = INPUT();


--bcd10[0] is bcd10[0]
--operation mode is output

bcd10[0] = OUTPUT(GND);


--bcd10[1] is bcd10[1]
--operation mode is output

bcd10[1] = OUTPUT(GND);


--bcd10[2] is bcd10[2]
--operation mode is output

bcd10[2] = OUTPUT(GND);


--bcd10[3] is bcd10[3]
--operation mode is output

bcd10[3] = OUTPUT(GND);


--bcd1[0] is bcd1[0]
--operation mode is output

bcd1[0] = OUTPUT(A1L4Q);


--bcd1[1] is bcd1[1]
--operation mode is output

bcd1[1] = OUTPUT(A1L7Q);


--bcd1[2] is bcd1[2]
--operation mode is output

bcd1[2] = OUTPUT(A1L10Q);


--bcd1[3] is bcd1[3]
--operation mode is output

bcd1[3] = OUTPUT(A1L13Q);


--c5 is c5
--operation mode is output

c5 = OUTPUT(co_1);