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📄 corraddr.h

📁 GPS导航定位程序
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/* Write */

#define CH03_CODE_SLEW_WRITE             ((CH03_ACCUMULATE+CODE_SLEW_WRITE)>>ADDRESS_SHIFT)
#define CH03_ACCUM_RESET                 ((CH03_ACCUMULATE+ACCUM_RESET)>>ADDRESS_SHIFT)
#define CH03_CODE_DCO_PRESET_PHASE       ((CH03_ACCUMULATE+CODE_DCO_PRESET_PHASE)>>ADDRESS_SHIFT)

/* Read */

#define CH04_I_TRACK                     ((CH04_ACCUMULATE+I_TRACK)>>ADDRESS_SHIFT)
#define CH04_Q_TRACK                     ((CH04_ACCUMULATE+Q_TRACK)>>ADDRESS_SHIFT)
#define CH04_I_PROMPT                    ((CH04_ACCUMULATE+I_PROMPT)>>ADDRESS_SHIFT)
#define CH04_Q_PROMPT                    ((CH04_ACCUMULATE+Q_PROMPT)>>ADDRESS_SHIFT)

/* Write */

#define CH04_CODE_SLEW_WRITE             ((CH04_ACCUMULATE+CODE_SLEW_WRITE)>>ADDRESS_SHIFT)
#define CH04_ACCUM_RESET                 ((CH04_ACCUMULATE+ACCUM_RESET)>>ADDRESS_SHIFT)
#define CH04_CODE_DCO_PRESET_PHASE       ((CH04_ACCUMULATE+CODE_DCO_PRESET_PHASE)>>ADDRESS_SHIFT)

/* Read */

#define CH05_I_TRACK                     ((CH05_ACCUMULATE+I_TRACK)>>ADDRESS_SHIFT)
#define CH05_Q_TRACK                     ((CH05_ACCUMULATE+Q_TRACK)>>ADDRESS_SHIFT)
#define CH05_I_PROMPT                    ((CH05_ACCUMULATE+I_PROMPT)>>ADDRESS_SHIFT)
#define CH05_Q_PROMPT                    ((CH05_ACCUMULATE+Q_PROMPT)>>ADDRESS_SHIFT)

/* Write */

#define CH05_CODE_SLEW_WRITE             ((CH05_ACCUMULATE+CODE_SLEW_WRITE)>>ADDRESS_SHIFT)
#define CH05_ACCUM_RESET                 ((CH05_ACCUMULATE+ACCUM_RESET)>>ADDRESS_SHIFT)
#define CH05_CODE_DCO_PRESET_PHASE       ((CH05_ACCUMULATE+CODE_DCO_PRESET_PHASE)>>ADDRESS_SHIFT)

/* Read */

#define CH06_I_TRACK                     ((CH06_ACCUMULATE+I_TRACK)>>ADDRESS_SHIFT)
#define CH06_Q_TRACK                     ((CH06_ACCUMULATE+Q_TRACK)>>ADDRESS_SHIFT)
#define CH06_I_PROMPT                    ((CH06_ACCUMULATE+I_PROMPT)>>ADDRESS_SHIFT)
#define CH06_Q_PROMPT                    ((CH06_ACCUMULATE+Q_PROMPT)>>ADDRESS_SHIFT)
            
/* Write */

#define CH06_CODE_SLEW_WRITE             ((CH06_ACCUMULATE+CODE_SLEW_WRITE)>>ADDRESS_SHIFT)
#define CH06_ACCUM_RESET                 ((CH06_ACCUMULATE+ACCUM_RESET)>>ADDRESS_SHIFT)
#define CH06_CODE_DCO_PRESET_PHASE       ((CH06_ACCUMULATE+CODE_DCO_PRESET_PHASE)>>ADDRESS_SHIFT)

/* Read */

#define CH07_I_TRACK                     ((CH07_ACCUMULATE+I_TRACK)>>ADDRESS_SHIFT)
#define CH07_Q_TRACK                     ((CH07_ACCUMULATE+Q_TRACK)>>ADDRESS_SHIFT)
#define CH07_I_PROMPT                    ((CH07_ACCUMULATE+I_PROMPT)>>ADDRESS_SHIFT)
#define CH07_Q_PROMPT                    ((CH07_ACCUMULATE+Q_PROMPT)>>ADDRESS_SHIFT)

/* Write */

#define CH07_CODE_SLEW_WRITE             ((CH07_ACCUMULATE+CODE_SLEW_WRITE)>>ADDRESS_SHIFT)
#define CH07_ACCUM_RESET                 ((CH07_ACCUMULATE+ACCUM_RESET)>>ADDRESS_SHIFT)
#define CH07_CODE_DCO_PRESET_PHASE       ((CH07_ACCUMULATE+CODE_DCO_PRESET_PHASE)>>ADDRESS_SHIFT)

/* Read */

#define CH08_I_TRACK                     ((CH08_ACCUMULATE+I_TRACK)>>ADDRESS_SHIFT)
#define CH08_Q_TRACK                     ((CH08_ACCUMULATE+Q_TRACK)>>ADDRESS_SHIFT)
#define CH08_I_PROMPT                    ((CH08_ACCUMULATE+I_PROMPT)>>ADDRESS_SHIFT)
#define CH08_Q_PROMPT                    ((CH08_ACCUMULATE+Q_PROMPT)>>ADDRESS_SHIFT)

/* Write */

#define CH08_CODE_SLEW_WRITE             ((CH08_ACCUMULATE+CODE_SLEW_WRITE)>>ADDRESS_SHIFT)
#define CH08_ACCUM_RESET                 ((CH08_ACCUMULATE+ACCUM_RESET)>>ADDRESS_SHIFT)
#define CH08_CODE_DCO_PRESET_PHASE       ((CH08_ACCUMULATE+CODE_DCO_PRESET_PHASE)>>ADDRESS_SHIFT)

/* Read */

#define CH09_I_TRACK                     ((CH09_ACCUMULATE+I_TRACK)>>ADDRESS_SHIFT)
#define CH09_Q_TRACK                     ((CH09_ACCUMULATE+Q_TRACK)>>ADDRESS_SHIFT)
#define CH09_I_PROMPT                    ((CH09_ACCUMULATE+I_PROMPT)>>ADDRESS_SHIFT)
#define CH09_Q_PROMPT                    ((CH09_ACCUMULATE+Q_PROMPT)>>ADDRESS_SHIFT)

/* Write */

#define CH09_CODE_SLEW_WRITE             ((CH09_ACCUMULATE+CODE_SLEW_WRITE)>>ADDRESS_SHIFT)
#define CH09_ACCUM_RESET                 ((CH09_ACCUMULATE+ACCUM_RESET)>>ADDRESS_SHIFT)
#define CH09_CODE_DCO_PRESET_PHASE       ((CH09_ACCUMULATE+CODE_DCO_PRESET_PHASE)>>ADDRESS_SHIFT)

/* Read */

#define CH10_I_TRACK                     ((CH10_ACCUMULATE+I_TRACK)>>ADDRESS_SHIFT)
#define CH10_Q_TRACK                     ((CH10_ACCUMULATE+Q_TRACK)>>ADDRESS_SHIFT)
#define CH10_I_PROMPT                    ((CH10_ACCUMULATE+I_PROMPT)>>ADDRESS_SHIFT)
#define CH10_Q_PROMPT                    ((CH10_ACCUMULATE+Q_PROMPT)>>ADDRESS_SHIFT)

/* Write */

#define CH10_CODE_SLEW_WRITE             ((CH10_ACCUMULATE+CODE_SLEW_WRITE)>>ADDRESS_SHIFT)
#define CH10_ACCUM_RESET                 ((CH10_ACCUMULATE+ACCUM_RESET)>>ADDRESS_SHIFT)
#define CH10_CODE_DCO_PRESET_PHASE       ((CH10_ACCUMULATE+CODE_DCO_PRESET_PHASE)>>ADDRESS_SHIFT)

/* Read */

#define CH11_I_TRACK                     ((CH11_ACCUMULATE+I_TRACK)>>ADDRESS_SHIFT)
#define CH11_Q_TRACK                     ((CH11_ACCUMULATE+Q_TRACK)>>ADDRESS_SHIFT)
#define CH11_I_PROMPT                    ((CH11_ACCUMULATE+I_PROMPT)>>ADDRESS_SHIFT)
#define CH11_Q_PROMPT                    ((CH11_ACCUMULATE+Q_PROMPT)>>ADDRESS_SHIFT)

/* Write */

#define CH11_CODE_SLEW_WRITE             ((CH11_ACCUMULATE+CODE_SLEW_WRITE)>>ADDRESS_SHIFT)
#define CH11_ACCUM_RESET                 ((CH11_ACCUMULATE+ACCUM_RESET)>>ADDRESS_SHIFT)
#define CH11_CODE_DCO_PRESET_PHASE       ((CH11_ACCUMULATE+CODE_DCO_PRESET_PHASE)>>ADDRESS_SHIFT)

/* Read */

#define CH12_I_TRACK                     ((CH12_ACCUMULATE+I_TRACK)>>ADDRESS_SHIFT)
#define CH12_Q_TRACK                     ((CH12_ACCUMULATE+Q_TRACK)>>ADDRESS_SHIFT)
#define CH12_I_PROMPT                    ((CH12_ACCUMULATE+I_PROMPT)>>ADDRESS_SHIFT)
#define CH12_Q_PROMPT                    ((CH12_ACCUMULATE+Q_PROMPT)>>ADDRESS_SHIFT)

/* Write */

#define CH12_CODE_SLEW_WRITE             ((CH12_ACCUMULATE+CODE_SLEW_WRITE)>>ADDRESS_SHIFT)
#define CH12_ACCUM_RESET                 ((CH12_ACCUMULATE+ACCUM_RESET)>>ADDRESS_SHIFT)
#define CH12_CODE_DCO_PRESET_PHASE       ((CH12_ACCUMULATE+CODE_DCO_PRESET_PHASE)>>ADDRESS_SHIFT)

/* Write */

#define MULTI_CODE_SLEW_WRITE            ((MULTI_ACCUMULATE+CODE_SLEW_WRITE)>>ADDRESS_SHIFT)
#define MULTI_ACCUM_RESET                ((MULTI_ACCUMULATE+ACCUM_RESET)>>ADDRESS_SHIFT)
#define MULTI_CODE_DCO_PRESET_PHASE      ((MULTI_ACCUMULATE+CODE_DCO_PRESET_PHASE)>>ADDRESS_SHIFT)

/* Write */

#define ALL_CODE_SLEW_WRITE              ((ALL_ACCUMULATE+CODE_SLEW_WRITE)>>ADDRESS_SHIFT)
#define ALL_ACCUM_RESET                  ((ALL_ACCUMULATE+ACCUM_RESET)>>ADDRESS_SHIFT)
#define ALL_CODE_DCO_PRESET_PHASE        ((ALL_ACCUMULATE+CODE_DCO_PRESET_PHASE)>>ADDRESS_SHIFT)

/***************************************************************************
* Define the system control register address as a function of the system
* control register address and the address shift.
***************************************************************************/

/* Read */
   
#define PROG_ACCUM_INT                   ((0x1AC)>>ADDRESS_SHIFT)
#define PROG_TIC_HIGH                    ((0x1B4)>>ADDRESS_SHIFT)
#define PROG_TIC_LOW                     ((0x1BC)>>ADDRESS_SHIFT)
#define TIMEMARK_CONTROL                 ((0x1EC)>>ADDRESS_SHIFT)
#define TEST_CONTROL                     ((0x1F0)>>ADDRESS_SHIFT)
#define MULTI_CHANNEL_SELECT             ((0x1F4)>>ADDRESS_SHIFT)
#define SYSTEM_SET_UP                    ((0x1F8)>>ADDRESS_SHIFT)
#define RESET_CONTROL                    ((0x1FC)>>ADDRESS_SHIFT)

/***************************************************************************
* Define the status register address as a function of the status register
* address and the address shift.
***************************************************************************/

/* Read */

#define ACCUM_STATUS_C                   ((0x200)>>ADDRESS_SHIFT)
#define MEAS_STATUS_A                    ((0x204)>>ADDRESS_SHIFT)
#define ACCUM_STATUS_A                   ((0x208)>>ADDRESS_SHIFT)
#define ACCUM_STATUS_B                   ((0x20C)>>ADDRESS_SHIFT)

/* Write */

#define STATUS                           ((0x200)>>ADDRESS_SHIFT)

/* Write */

#define X_DCO_INCR_HIGH                  ((0x1A4)>>ADDRESS_SHIFT)

/***************************************************************************
* Define the Real Time Clock register addresses as a function of the Real
* Time Clock register addresses and the address shift.
***************************************************************************/

#define LS_REGISTER_LATCH                ((0x300)>>ADDRESS_SHIFT)
#define SECOND_REGISTER                  ((0x304)>>ADDRESS_SHIFT)
#define MS_REGISTER                      ((0x308)>>ADDRESS_SHIFT)
#define CLOCK_RESET                      ((0x30C)>>ADDRESS_SHIFT)
#define WATCHDOG_RESET                   ((0x310)>>ADDRESS_SHIFT)

/***************************************************************************
* Define the DUART register addresses as a function of the DUART register
* addresses and the address shift.
***************************************************************************/

#define TX_RX_CH_A                       ((0x340)>>ADDRESS_SHIFT)
#define TX_RX_CH_B                       ((0x344)>>ADDRESS_SHIFT)
#define CONFIG_STATUS_CH_A               ((0x348)>>ADDRESS_SHIFT)
#define CONFIG_STATUS_CH_B               ((0x34C)>>ADDRESS_SHIFT)
#define RESET_CH_A                       ((0x350)>>ADDRESS_SHIFT)
#define RESET_CH_B                       ((0x354)>>ADDRESS_SHIFT)
#define TX_RATE_CH_A                     ((0x358)>>ADDRESS_SHIFT)
#define TX_RATE_CH_B                     ((0x35C)>>ADDRESS_SHIFT)

/***************************************************************************
* Define the System Control register address as a function of the System
* Control register address and the address shift.
***************************************************************************/

#define WAIT_STATE_REGISTER              ((0x380)>>ADDRESS_SHIFT)
#define SYSTEM_CONFIG                    ((0x384)>>ADDRESS_SHIFT)
#define SYSTEM_ERROR_STATUS_REGISTER     ((0x38C)>>ADDRESS_SHIFT)
#define DATA_RETENT_VALIDATION_REGISTER  ((0x390)>>ADDRESS_SHIFT)

/***************************************************************************
* Define the General Control register address as a function of the General
* Control register address and the address shift.
***************************************************************************/

#define DISCIO_CONFIG                    ((0x3C0)>>ADDRESS_SHIFT)
#define TEST_CONFIG                      ((0x3C4)>>ADDRESS_SHIFT)
#define DATA_BUS_TEST                    ((0x3C8)>>ADDRESS_SHIFT)

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