opb_vga_v2_1_0.pao

xilinx ISE 实例代码。可用ISE直接打开

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## ** Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.            **
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## ** You may copy and modify these files for your own internal use solely  **
## ** with Xilinx programmable logic devices and Xilinx EDK system or       **
## ** create IP modules solely for Xilinx programmable logic devices and    **
## ** Xilinx EDK system. No rights are granted to distribute any files      **
## ** unless they are distributed in Xilinx programmable logic devices.     **
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## Filename:          E:\MYPROGRAM\EDK\EDK_vga\pcores\opb_vga_v1_00_a\data\opb_vga_v2_1_0.pao
## Description:       Peripheral Analysis Order
## Date:              Fri Aug 18 16:47:37 2006 (by Create and Import Peripheral Wizard)
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lib opb_vga_v1_00_a color_map verilog
lib opb_vga_v1_00_a vga_sync verilog
lib opb_vga_v1_00_a myVGA verilog
lib opb_vga_v1_00_a opb_ipif verilog
lib opb_vga_v1_00_a opb_vga verilog