a8255.tan.summary

8255并行接口芯片得VHDL描述

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 7.786 ns
From           : nCS
To             : portcout:I_portcout|PortCOutRegQ[3]
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 13.487 ns
From           : cntl_log:I_cntl_log|ControlRegQ[6]
To             : DOUT[4]
From Clock     : CLK
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 14.138 ns
From           : A[0]
To             : DOUT[4]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -1.819 ns
From           : PAIN[6]
To             : portain:I_portain|PortAInRegQ[6]
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Clock Setup: 'CLK'
Slack          : N/A
Required Time  : None
Actual Time    : 267.17 MHz ( period = 3.743 ns )
From           : portcout:I_portcout|PortCOutRegQ[3]
To             : portcout:I_portcout|PortCOutRegQ[3]
From Clock     : CLK
To Clock       : CLK
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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