📄 16位锁存器.txt
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library ieee;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity mcu_latch is
generic (setup_time : TIME := 10 ns );
port(
MCU_EN_LATCH1 : in std_logic;
AD : inout std_logic_vector(16 DOWNTO 0);
D : in std_logic_vector(16 DOWNTO 0);
SRAM_CPLD_ADDR : out std_logic_vector(16 DOWNTO 0)
);
end mcu_latch ;
architecture behavioral1 of mcu_latch is
begin
AD <= D ;
process(MCU_EN_LATCH1)
begin
if (MCU_EN_LATCH1 = '1') then
SRAM_CPLD_ADDR <= "ZZZZZZZZZZZZZZZZZ";
else
if (MCU_EN_LATCH1 = '0') then
NULL ;
elsif MCU_ALE1'event and MCU_ALE1 = '1' and MCU_ALE1'LAST_VALUE ='0' then
NULL ;
elsif MCU_ALE1'LAST_EVENT >= setup_time then
if MCU_ALE1'event and MCU_ALE1 = '0'and MCU_ALE1'LAST_VALUE ='1' then
else
SRAM_CPLD_ADDR <= AD ;
end if ;
end if ;
end if ;
end process ;
end behavioral1;
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