rs_5_3_codec.vo

学习使用FPGA做一些简单的编码器,RS(5,3)编码就是5个字符中有5-3=2两个校正字

defparam \DATA_IN[2]~I .operation_mode = "input";
defparam \DATA_IN[2]~I .reg_source_mode = "none";
defparam \DATA_IN[2]~I .feedback_mode = "from_pin";
// synopsys translate_on

// atom is at LC3_C14
flex10ke_lcell \i387~733_I (
// Equation(s):
// \i387~733  = \SYND1_[2]  $ (!\i17~110  # !\i124~44 ) # !\DATA_VALID_IN~dataout 

	.dataa(\DATA_VALID_IN~dataout ),
	.datab(\SYND1_[2] ),
	.datac(\i124~44 ),
	.datad(\i17~110 ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(),
	.cout(),
	.cascout(\i387~733 ));
// synopsys translate_off
defparam \i387~733_I .operation_mode = "normal";
defparam \i387~733_I .packed_mode = "false";
defparam \i387~733_I .lut_mask = "D777";
defparam \i387~733_I .clock_enable_mode = "false";
defparam \i387~733_I .output_mode = "none";
// synopsys translate_on

// atom is at LC4_C14
flex10ke_lcell \i387~735_I (
// Equation(s):
// \i387~735  = (\DATA_VALID_IN~dataout  # \DATA_IN[2]~dataout  $ (!\i~10  # !\SYND1_[2] )) & CASCADE(\i387~733 )

	.dataa(\DATA_IN[2]~dataout ),
	.datab(\SYND1_[2] ),
	.datac(\i~10 ),
	.datad(\DATA_VALID_IN~dataout ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(\i387~733 ),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i387~735 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i387~735_I .operation_mode = "normal";
defparam \i387~735_I .packed_mode = "false";
defparam \i387~735_I .lut_mask = "FF95";
defparam \i387~735_I .clock_enable_mode = "false";
defparam \i387~735_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC6_C14
flex10ke_lcell \SYND1_[2]~I (
// Equation(s):
// \SYND1_[2]  = DFFEA(!\i387~735 , GLOBAL(\CLK~dataout ), GLOBAL(\RESET~dataout ), , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\i387~735 ),
	.aclr(!\RESET~dataout ),
	.aload(gnd),
	.clk(\CLK~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\SYND1_[2] ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \SYND1_[2]~I .operation_mode = "normal";
defparam \SYND1_[2]~I .packed_mode = "false";
defparam \SYND1_[2]~I .lut_mask = "00FF";
defparam \SYND1_[2]~I .clock_enable_mode = "false";
defparam \SYND1_[2]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC1_C14
flex10ke_lcell \i17~110_I (
// Equation(s):
// \i17~110  = \SYND2_[5]  $ \SYND2_[1]  $ (\SYND1_[2]  & \E_D~dataout )

	.dataa(\SYND2_[5] ),
	.datab(\SYND2_[1] ),
	.datac(\SYND1_[2] ),
	.datad(\E_D~dataout ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i17~110 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i17~110_I .operation_mode = "normal";
defparam \i17~110_I .packed_mode = "false";
defparam \i17~110_I .lut_mask = "9666";
defparam \i17~110_I .clock_enable_mode = "false";
defparam \i17~110_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC8_C14
flex10ke_lcell \i395~178_I (
// Equation(s):
// \i395~178  = \DATA_IN[2]~dataout  $ (\i17~110  & \i~10 )

	.dataa(vcc),
	.datab(\i17~110 ),
	.datac(\i~10 ),
	.datad(\DATA_IN[2]~dataout ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i395~178 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i395~178_I .operation_mode = "normal";
defparam \i395~178_I .packed_mode = "false";
defparam \i395~178_I .lut_mask = "3FC0";
defparam \i395~178_I .clock_enable_mode = "false";
defparam \i395~178_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC1_D28
flex10ke_lcell \SYND2_[2]~I (
// Equation(s):
// \SYND2_[2]  = DFFEA(\DATA_VALID_IN~dataout  & !\i124~44  & \SYND2_[2]  # !\DATA_VALID_IN~dataout  & \i395~178 , GLOBAL(\CLK~dataout ), GLOBAL(\RESET~dataout ), , , , )

	.dataa(\i124~44 ),
	.datab(\DATA_VALID_IN~dataout ),
	.datac(\SYND2_[2] ),
	.datad(\i395~178 ),
	.aclr(!\RESET~dataout ),
	.aload(gnd),
	.clk(\CLK~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\SYND2_[2] ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \SYND2_[2]~I .operation_mode = "normal";
defparam \SYND2_[2]~I .packed_mode = "false";
defparam \SYND2_[2]~I .lut_mask = "7340";
defparam \SYND2_[2]~I .clock_enable_mode = "false";
defparam \SYND2_[2]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC1_C11
flex10ke_lcell \m0_|i10~26_I (
// Equation(s):
// \m0_|i10~26  = \SYND2_[7]  $ \SYND2_[2]  $ \SYND2_[6] 

	.dataa(vcc),
	.datab(\SYND2_[7] ),
	.datac(\SYND2_[2] ),
	.datad(\SYND2_[6] ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\m0_|i10~26 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \m0_|i10~26_I .operation_mode = "normal";
defparam \m0_|i10~26_I .packed_mode = "false";
defparam \m0_|i10~26_I .lut_mask = "C33C";
defparam \m0_|i10~26_I .clock_enable_mode = "false";
defparam \m0_|i10~26_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at Pin_130
flex10ke_io \DATA_IN[4]~I (
	.datain(),
	.clk(),
	.ena(vcc),
	.aclr(gnd),
	.oe(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.dataout(\DATA_IN[4]~dataout ),
	.padio(DATA_IN[4]));
// synopsys translate_off
defparam \DATA_IN[4]~I .operation_mode = "input";
defparam \DATA_IN[4]~I .reg_source_mode = "none";
defparam \DATA_IN[4]~I .feedback_mode = "from_pin";
// synopsys translate_on

// atom is at LC7_C10
flex10ke_lcell \i385~397_I (
// Equation(s):
// \i385~397  = \SYND1_[4]  $ (!\i15~288  # !\i124~44 ) # !\DATA_VALID_IN~dataout 

	.dataa(\DATA_VALID_IN~dataout ),
	.datab(\SYND1_[4] ),
	.datac(\i124~44 ),
	.datad(\i15~288 ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(),
	.cout(),
	.cascout(\i385~397 ));
// synopsys translate_off
defparam \i385~397_I .operation_mode = "normal";
defparam \i385~397_I .packed_mode = "false";
defparam \i385~397_I .lut_mask = "D777";
defparam \i385~397_I .clock_enable_mode = "false";
defparam \i385~397_I .output_mode = "none";
// synopsys translate_on

// atom is at LC8_C10
flex10ke_lcell \i385~399_I (
// Equation(s):
// \i385~399  = (\DATA_VALID_IN~dataout  # \DATA_IN[4]~dataout  $ (!\i~10  # !\SYND1_[4] )) & CASCADE(\i385~397 )

	.dataa(\DATA_IN[4]~dataout ),
	.datab(\SYND1_[4] ),
	.datac(\i~10 ),
	.datad(\DATA_VALID_IN~dataout ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(\i385~397 ),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i385~399 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i385~399_I .operation_mode = "normal";
defparam \i385~399_I .packed_mode = "false";
defparam \i385~399_I .lut_mask = "FF95";
defparam \i385~399_I .clock_enable_mode = "false";
defparam \i385~399_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC6_C10
flex10ke_lcell \SYND1_[4]~I (
// Equation(s):
// \SYND1_[4]  = DFFEA(!\i385~399 , GLOBAL(\CLK~dataout ), GLOBAL(\RESET~dataout ), , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\i385~399 ),
	.aclr(!\RESET~dataout ),
	.aload(gnd),
	.clk(\CLK~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\SYND1_[4] ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \SYND1_[4]~I .operation_mode = "normal";
defparam \SYND1_[4]~I .packed_mode = "false";
defparam \SYND1_[4]~I .lut_mask = "00FF";
defparam \SYND1_[4]~I .clock_enable_mode = "false";
defparam \SYND1_[4]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at Pin_63
flex10ke_io \DATA_IN[3]~I (
	.datain(),
	.clk(),
	.ena(vcc),
	.aclr(gnd),
	.oe(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.dataout(\DATA_IN[3]~dataout ),
	.padio(DATA_IN[3]));
// synopsys translate_off
defparam \DATA_IN[3]~I .operation_mode = "input";
defparam \DATA_IN[3]~I .reg_source_mode = "none";
defparam \DATA_IN[3]~I .feedback_mode = "from_pin";
// synopsys translate_on

// atom is at LC7_C11
flex10ke_lcell \i386~397_I (
// Equation(s):
// \i386~397  = \SYND1_[3]  $ (!\i16~92  # !\i124~44 ) # !\DATA_VALID_IN~dataout 

	.dataa(\DATA_VALID_IN~dataout ),
	.datab(\SYND1_[3] ),
	.datac(\i124~44 ),
	.datad(\i16~92 ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(),
	.cout(),
	.cascout(\i386~397 ));
// synopsys translate_off
defparam \i386~397_I .operation_mode = "normal";
defparam \i386~397_I .packed_mode = "false";
defparam \i386~397_I .lut_mask = "D777";
defparam \i386~397_I .clock_enable_mode = "false";
defparam \i386~397_I .output_mode = "none";
// synopsys translate_on

// atom is at LC8_C11
flex10ke_lcell \i386~399_I (
// Equation(s):
// \i386~399  = (\DATA_VALID_IN~dataout  # \DATA_IN[3]~dataout  $ (!\i~10  # !\SYND1_[3] )) & CASCADE(\i386~397 )

	.dataa(\DATA_IN[3]~dataout ),
	.datab(\SYND1_[3] ),
	.datac(\i~10 ),
	.datad(\DATA_VALID_IN~dataout ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(\i386~397 ),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i386~399 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i386~399_I .operation_mode = "normal";
defparam \i386~399_I .packed_mode = "false";
defparam \i386~399_I .lut_mask = "FF95";
defparam \i386~399_I .clock_enable_mode = "false";
defparam \i386~399_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC3_C11
flex10ke_lcell \SYND1_[3]~I (
// Equation(s):
// \SYND1_[3]  = DFFEA(!\i386~399 , GLOBAL(\CLK~dataout ), GLOBAL(\RESET~dataout ), , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\i386~399 ),
	.aclr(!\RESET~dataout ),
	.aload(gnd),
	.clk(\CLK~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\SYND1_[3] ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \SYND1_[3]~I .operation_mode = "normal";
defparam \SYND1_[3]~I .packed_mode = "false";
defparam \SYND1_[3]~I .lut_mask = "00FF";
defparam \SYND1_[3]~I .clock_enable_mode = "false";
defparam \SYND1_[3]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC2_C11
flex10ke_lcell \m0_|i10~I (
// Equation(s):
// \m0_|i10  = \m0_|i10~26  $ \SYND2_[0]  $ \SYND2_[5] 

	.dataa(vcc),
	.datab(\m0_|i10~26 ),
	.datac(\SYND2_[0] ),
	.datad(\SYND2_[5] ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\m0_|i10 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \m0_|i10~I .operation_mode = "normal";
defparam \m0_|i10~I .packed_mode = "false";
defparam \m0_|i10~I .lut_mask = "C33C";
defparam \m0_|i10~I .clock_enable_mode = "false";
defparam \m0_|i10~I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC6_C11
flex10ke_lcell \i16~92_I (
// Equation(s):
// \i16~92  = \m0_|i10  $ (\SYND1_[3]  & \E_D~dataout )

	.dataa(vcc),
	.datab(\SYND1_[3] ),
	.datac(\E_D~dataout ),
	.datad(\m0_|i10 ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i16~92 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i16~92_I .operation_mode = "normal";
defparam \i16~92_I .packed_mode = "false";
defparam \i16~92_I .lut_mask = "3FC0";
defparam \i16~92_I .clock_enable_mode = "false";
defparam \i16~92_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC3_C16
flex10ke_lcell \i394~178_I (
// Equation(s):
// \i394~178  = \DATA_IN[3]~dataout  $ (\i16~92  & \i~10 )

	.dataa(vcc),
	.datab(\i16~92 ),
	.datac(\i~10 ),
	.datad(\DATA_IN[3]~dataout ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i394~178 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i394~178_I .operation_mode = "normal";
defparam \i394~178_I .packed_mode = "false";
defparam \i394~178_I .lut_mask = "3FC0";
defparam \i394~178_I .clock_enable_mode = "false";
defparam \i394~178_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC2_C32
flex10ke_lcell \SYND2_[3]~I (
// Equation(s):
// \SYND2_[3]  = DFFEA(\DATA_VALID_IN~dataout  & !\i124~44  & \SYND2_[3]  # !\DATA_VALID_IN~dataout  & \i394~178 , GLOBAL(\CLK~dataout ), GLOBAL(\RESET~dataout ), , , , )

	.dataa(\i124~44 ),
	.datab(\DATA_VALID_IN~dataout ),
	.datac(\SYND2_[3] ),
	.datad(\i394~178 ),
	.aclr(!\RESET~dataout ),
	.aload(gnd),
	.clk(\CLK~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\SYND2_[3] ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \SYND2_[3]~I .operation_mode = "normal";
defparam \SYND2_[3]~I .packed_mode = "false";
defparam \SYND2_[3]~I .lut_mask = "7340";
defparam \SYND2_[3]~I .clock_enable_mode = "false";