rs_5_3_codec.vo

学习使用FPGA做一些简单的编码器,RS(5,3)编码就是5个字符中有5-3=2两个校正字

flex10ke_lcell \i130~215_I (
// Equation(s):
// \i130~215  = !\cntr2_[0]  & !\cntr2_[1]  & !\cntr2_[2]  & !cntr2_en

	.dataa(\cntr2_[0] ),
	.datab(\cntr2_[1] ),
	.datac(\cntr2_[2] ),
	.datad(cntr2_en),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i130~215 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i130~215_I .operation_mode = "normal";
defparam \i130~215_I .packed_mode = "false";
defparam \i130~215_I .lut_mask = "0001";
defparam \i130~215_I .clock_enable_mode = "false";
defparam \i130~215_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC4_D13
flex10ke_lcell \i130~213_I (
// Equation(s):
// \i130~213  = \cntr1_[0]  & !\cntr1_[1]  # !\cntr1_[0]  & (\cntr1_[1]  # \E_D~dataout )

	.dataa(vcc),
	.datab(\cntr1_[0] ),
	.datac(\cntr1_[1] ),
	.datad(\E_D~dataout ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i130~213 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i130~213_I .operation_mode = "normal";
defparam \i130~213_I .packed_mode = "false";
defparam \i130~213_I .lut_mask = "3F3C";
defparam \i130~213_I .clock_enable_mode = "false";
defparam \i130~213_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC2_D13
flex10ke_lcell \i130~214_I (
// Equation(s):
// \i130~214  = !\cntr1_[3]  & !\cntr1_[2]  & \i130~213 

	.dataa(vcc),
	.datab(\cntr1_[3] ),
	.datac(\cntr1_[2] ),
	.datad(\i130~213 ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i130~214 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i130~214_I .operation_mode = "normal";
defparam \i130~214_I .packed_mode = "false";
defparam \i130~214_I .lut_mask = "0300";
defparam \i130~214_I .clock_enable_mode = "false";
defparam \i130~214_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC8_C18
flex10ke_lcell \DATA_VALID_OUT~reg0_I (
// Equation(s):
// \DATA_VALID_OUT~reg0  = DFFEA(\i130~214  & !\DATA_VALID_IN~dataout  # !\i130~214  & (\i124~44  # !\i130~215 ), GLOBAL(\CLK~dataout ), GLOBAL(\RESET~dataout ), , , , )

	.dataa(\i124~44 ),
	.datab(\i130~215 ),
	.datac(\i130~214 ),
	.datad(\DATA_VALID_IN~dataout ),
	.aclr(!\RESET~dataout ),
	.aload(gnd),
	.clk(\CLK~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\DATA_VALID_OUT~reg0 ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \DATA_VALID_OUT~reg0_I .operation_mode = "normal";
defparam \DATA_VALID_OUT~reg0_I .packed_mode = "false";
defparam \DATA_VALID_OUT~reg0_I .lut_mask = "0BFB";
defparam \DATA_VALID_OUT~reg0_I .clock_enable_mode = "false";
defparam \DATA_VALID_OUT~reg0_I .output_mode = "reg_only";
// synopsys translate_on

// atom is at Pin_114
flex10ke_io \DATA_IN[0]~I (
	.datain(),
	.clk(),
	.ena(vcc),
	.aclr(gnd),
	.oe(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.dataout(\DATA_IN[0]~dataout ),
	.padio(DATA_IN[0]));
// synopsys translate_off
defparam \DATA_IN[0]~I .operation_mode = "input";
defparam \DATA_IN[0]~I .reg_source_mode = "none";
defparam \DATA_IN[0]~I .feedback_mode = "from_pin";
// synopsys translate_on

// atom is at LC3_D13
flex10ke_lcell \i~10_I (
// Equation(s):
// \i~10  = \cntr1_[0]  # \cntr1_[1]  # \cntr1_[2]  # \cntr1_[3] 

	.dataa(\cntr1_[0] ),
	.datab(\cntr1_[1] ),
	.datac(\cntr1_[2] ),
	.datad(\cntr1_[3] ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i~10 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i~10_I .operation_mode = "normal";
defparam \i~10_I .packed_mode = "false";
defparam \i~10_I .lut_mask = "FFFE";
defparam \i~10_I .clock_enable_mode = "false";
defparam \i~10_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at Pin_121
flex10ke_io \DATA_IN[6]~I (
	.datain(),
	.clk(),
	.ena(vcc),
	.aclr(gnd),
	.oe(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.dataout(\DATA_IN[6]~dataout ),
	.padio(DATA_IN[6]));
// synopsys translate_off
defparam \DATA_IN[6]~I .operation_mode = "input";
defparam \DATA_IN[6]~I .reg_source_mode = "none";
defparam \DATA_IN[6]~I .feedback_mode = "from_pin";
// synopsys translate_on

// atom is at LC5_C16
flex10ke_lcell \i383~397_I (
// Equation(s):
// \i383~397  = \SYND1_[6]  $ (!\i13~204  # !\i124~44 ) # !\DATA_VALID_IN~dataout 

	.dataa(\DATA_VALID_IN~dataout ),
	.datab(\SYND1_[6] ),
	.datac(\i124~44 ),
	.datad(\i13~204 ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(),
	.cout(),
	.cascout(\i383~397 ));
// synopsys translate_off
defparam \i383~397_I .operation_mode = "normal";
defparam \i383~397_I .packed_mode = "false";
defparam \i383~397_I .lut_mask = "D777";
defparam \i383~397_I .clock_enable_mode = "false";
defparam \i383~397_I .output_mode = "none";
// synopsys translate_on

// atom is at LC6_C16
flex10ke_lcell \i383~399_I (
// Equation(s):
// \i383~399  = (\DATA_VALID_IN~dataout  # \DATA_IN[6]~dataout  $ (!\i~10  # !\SYND1_[6] )) & CASCADE(\i383~397 )

	.dataa(\DATA_IN[6]~dataout ),
	.datab(\SYND1_[6] ),
	.datac(\i~10 ),
	.datad(\DATA_VALID_IN~dataout ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(\i383~397 ),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i383~399 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i383~399_I .operation_mode = "normal";
defparam \i383~399_I .packed_mode = "false";
defparam \i383~399_I .lut_mask = "FF95";
defparam \i383~399_I .clock_enable_mode = "false";
defparam \i383~399_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC2_C16
flex10ke_lcell \SYND1_[6]~I (
// Equation(s):
// \SYND1_[6]  = DFFEA(!\i383~399 , GLOBAL(\CLK~dataout ), GLOBAL(\RESET~dataout ), , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\i383~399 ),
	.aclr(!\RESET~dataout ),
	.aload(gnd),
	.clk(\CLK~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\SYND1_[6] ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \SYND1_[6]~I .operation_mode = "normal";
defparam \SYND1_[6]~I .packed_mode = "false";
defparam \SYND1_[6]~I .lut_mask = "00FF";
defparam \SYND1_[6]~I .clock_enable_mode = "false";
defparam \SYND1_[6]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC4_D18
flex10ke_lcell \i397~178_I (
// Equation(s):
// \i397~178  = \DATA_IN[0]~dataout  $ (\i19~110  & \i~10 )

	.dataa(vcc),
	.datab(\i19~110 ),
	.datac(\i~10 ),
	.datad(\DATA_IN[0]~dataout ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i397~178 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i397~178_I .operation_mode = "normal";
defparam \i397~178_I .packed_mode = "false";
defparam \i397~178_I .lut_mask = "3FC0";
defparam \i397~178_I .clock_enable_mode = "false";
defparam \i397~178_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC2_D33
flex10ke_lcell \SYND2_[0]~I (
// Equation(s):
// \SYND2_[0]  = DFFEA(\DATA_VALID_IN~dataout  & !\i124~44  & \SYND2_[0]  # !\DATA_VALID_IN~dataout  & \i397~178 , GLOBAL(\CLK~dataout ), GLOBAL(\RESET~dataout ), , , , )

	.dataa(\i124~44 ),
	.datab(\DATA_VALID_IN~dataout ),
	.datac(\SYND2_[0] ),
	.datad(\i397~178 ),
	.aclr(!\RESET~dataout ),
	.aload(gnd),
	.clk(\CLK~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\SYND2_[0] ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \SYND2_[0]~I .operation_mode = "normal";
defparam \SYND2_[0]~I .packed_mode = "false";
defparam \SYND2_[0]~I .lut_mask = "7340";
defparam \SYND2_[0]~I .clock_enable_mode = "false";
defparam \SYND2_[0]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at Pin_96
flex10ke_io \DATA_IN[1]~I (
	.datain(),
	.clk(),
	.ena(vcc),
	.aclr(gnd),
	.oe(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.dataout(\DATA_IN[1]~dataout ),
	.padio(DATA_IN[1]));
// synopsys translate_off
defparam \DATA_IN[1]~I .operation_mode = "input";
defparam \DATA_IN[1]~I .reg_source_mode = "none";
defparam \DATA_IN[1]~I .feedback_mode = "from_pin";
// synopsys translate_on

// atom is at LC6_C17
flex10ke_lcell \i388~734_I (
// Equation(s):
// \i388~734  = \SYND1_[1]  $ (!\i18~110  # !\i124~44 ) # !\DATA_VALID_IN~dataout 

	.dataa(\DATA_VALID_IN~dataout ),
	.datab(\SYND1_[1] ),
	.datac(\i124~44 ),
	.datad(\i18~110 ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(),
	.cout(),
	.cascout(\i388~734 ));
// synopsys translate_off
defparam \i388~734_I .operation_mode = "normal";
defparam \i388~734_I .packed_mode = "false";
defparam \i388~734_I .lut_mask = "D777";
defparam \i388~734_I .clock_enable_mode = "false";
defparam \i388~734_I .output_mode = "none";
// synopsys translate_on

// atom is at LC7_C17
flex10ke_lcell \i388~736_I (
// Equation(s):
// \i388~736  = (\DATA_VALID_IN~dataout  # \DATA_IN[1]~dataout  $ (!\i~10  # !\SYND1_[1] )) & CASCADE(\i388~734 )

	.dataa(\DATA_IN[1]~dataout ),
	.datab(\SYND1_[1] ),
	.datac(\i~10 ),
	.datad(\DATA_VALID_IN~dataout ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(\i388~734 ),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i388~736 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i388~736_I .operation_mode = "normal";
defparam \i388~736_I .packed_mode = "false";
defparam \i388~736_I .lut_mask = "FF95";
defparam \i388~736_I .clock_enable_mode = "false";
defparam \i388~736_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC2_C17
flex10ke_lcell \SYND1_[1]~I (
// Equation(s):
// \SYND1_[1]  = DFFEA(!\i388~736 , GLOBAL(\CLK~dataout ), GLOBAL(\RESET~dataout ), , , , )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\i388~736 ),
	.aclr(!\RESET~dataout ),
	.aload(gnd),
	.clk(\CLK~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\SYND1_[1] ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \SYND1_[1]~I .operation_mode = "normal";
defparam \SYND1_[1]~I .packed_mode = "false";
defparam \SYND1_[1]~I .lut_mask = "00FF";
defparam \SYND1_[1]~I .clock_enable_mode = "false";
defparam \SYND1_[1]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC3_C17
flex10ke_lcell \i18~110_I (
// Equation(s):
// \i18~110  = \SYND2_[6]  $ \SYND2_[0]  $ (\SYND1_[1]  & \E_D~dataout )

	.dataa(\SYND2_[6] ),
	.datab(\SYND2_[0] ),
	.datac(\SYND1_[1] ),
	.datad(\E_D~dataout ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i18~110 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i18~110_I .operation_mode = "normal";
defparam \i18~110_I .packed_mode = "false";
defparam \i18~110_I .lut_mask = "9666";
defparam \i18~110_I .clock_enable_mode = "false";
defparam \i18~110_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC8_C17
flex10ke_lcell \i396~178_I (
// Equation(s):
// \i396~178  = \DATA_IN[1]~dataout  $ (\i18~110  & \i~10 )

	.dataa(vcc),
	.datab(\i18~110 ),
	.datac(\i~10 ),
	.datad(\DATA_IN[1]~dataout ),
	.aclr(gnd),
	.aload(gnd),
	.clk(),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\i396~178 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \i396~178_I .operation_mode = "normal";
defparam \i396~178_I .packed_mode = "false";
defparam \i396~178_I .lut_mask = "3FC0";
defparam \i396~178_I .clock_enable_mode = "false";
defparam \i396~178_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC1_D32
flex10ke_lcell \SYND2_[1]~I (
// Equation(s):
// \SYND2_[1]  = DFFEA(\DATA_VALID_IN~dataout  & !\i124~44  & \SYND2_[1]  # !\DATA_VALID_IN~dataout  & \i396~178 , GLOBAL(\CLK~dataout ), GLOBAL(\RESET~dataout ), , , , )

	.dataa(\i124~44 ),
	.datab(\DATA_VALID_IN~dataout ),
	.datac(\SYND2_[1] ),
	.datad(\i396~178 ),
	.aclr(!\RESET~dataout ),
	.aload(gnd),
	.clk(\CLK~dataout ),
	.cin(gnd),
	.cascin(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\SYND2_[1] ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \SYND2_[1]~I .operation_mode = "normal";
defparam \SYND2_[1]~I .packed_mode = "false";
defparam \SYND2_[1]~I .lut_mask = "7340";
defparam \SYND2_[1]~I .clock_enable_mode = "false";
defparam \SYND2_[1]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at Pin_60
flex10ke_io \DATA_IN[2]~I (
	.datain(),
	.clk(),
	.ena(vcc),
	.aclr(gnd),
	.oe(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.dataout(\DATA_IN[2]~dataout ),
	.padio(DATA_IN[2]));
// synopsys translate_off