de2_tv.map.rpt

在DE2平台上实现把DVD转换到LED上显示

Analysis & Synthesis report for DE2_TV
Mon Aug 06 16:55:20 2007
Quartus II Version 6.1 Build 201 11/27/2006 SJ Web Edition


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; Table of Contents ;
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  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Analysis & Synthesis Default Parameter Settings
  5. Analysis & Synthesis Source Files Read
  6. Analysis & Synthesis Resource Usage Summary
  7. Analysis & Synthesis Resource Utilization by Entity
  8. Analysis & Synthesis RAM Summary
  9. Analysis & Synthesis DSP Block Usage Summary
 10. State Machine - |DE2_TV|I2C_AV_Config:u1|mSetup_ST
 11. Registers Removed During Synthesis
 12. General Register Statistics
 13. Inverted Register Statistics
 14. Multiplexer Restructuring Statistics (Restructuring Performed)
 15. Source assignments for DIV:u5|lpm_divide:lpm_divide_component|lpm_divide_d6t:auto_generated|sign_div_unsign_3li:divider|alt_u_div_7qg:divider
 16. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component
 17. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated
 18. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|altsyncram_jk61:fifo_ram
 19. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|altsyncram_jk61:fifo_ram|altsyncram_drg1:altsyncram3
 20. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:rs_brp
 21. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:rs_bwp
 22. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp
 23. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp|dffpipe_pe9:dffpipe6
 24. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:ws_brp
 25. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:ws_bwp
 26. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp
 27. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp|dffpipe_qe9:dffpipe9
 28. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component
 29. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated
 30. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|altsyncram_jk61:fifo_ram
 31. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|altsyncram_jk61:fifo_ram|altsyncram_drg1:altsyncram3
 32. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:rs_brp
 33. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:rs_bwp
 34. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp
 35. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp|dffpipe_pe9:dffpipe6
 36. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:ws_brp
 37. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:ws_bwp
 38. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp
 39. Source assignments for Sdram_Control_4Port:u6|Sdram_WR_FIFO:write_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp|dffpipe_qe9:dffpipe9
 40. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component
 41. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated
 42. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|altsyncram_jk61:fifo_ram
 43. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|altsyncram_jk61:fifo_ram|altsyncram_drg1:altsyncram3
 44. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:rs_brp
 45. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:rs_bwp
 46. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp
 47. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp|dffpipe_pe9:dffpipe6
 48. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:ws_brp
 49. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:ws_bwp
 50. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp
 51. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo1|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp|dffpipe_qe9:dffpipe9
 52. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component
 53. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated
 54. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|altsyncram_jk61:fifo_ram
 55. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|altsyncram_jk61:fifo_ram|altsyncram_drg1:altsyncram3
 56. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:rs_brp
 57. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:rs_bwp
 58. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp
 59. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_vd8:rs_dgwp|dffpipe_pe9:dffpipe6
 60. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:ws_brp
 61. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|dffpipe_oe9:ws_bwp
 62. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp
 63. Source assignments for Sdram_Control_4Port:u6|Sdram_RD_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_fnk1:auto_generated|alt_synch_pipe_0e8:ws_dgrp|dffpipe_qe9:dffpipe9
 64. Source assignments for YCbCr2RGB:u8|MAC_3:u0|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated
 65. Source assignments for YCbCr2RGB:u8|MAC_3:u0|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult1|dffpipe_b3c:pre_result
 66. Source assignments for YCbCr2RGB:u8|MAC_3:u0|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult2|dffpipe_b3c:pre_result
 67. Source assignments for YCbCr2RGB:u8|MAC_3:u0|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult3|dffpipe_b3c:pre_result
 68. Source assignments for YCbCr2RGB:u8|MAC_3:u1|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated
 69. Source assignments for YCbCr2RGB:u8|MAC_3:u1|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult1|dffpipe_b3c:pre_result
 70. Source assignments for YCbCr2RGB:u8|MAC_3:u1|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult2|dffpipe_b3c:pre_result
 71. Source assignments for YCbCr2RGB:u8|MAC_3:u1|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult3|dffpipe_b3c:pre_result
 72. Source assignments for YCbCr2RGB:u8|MAC_3:u2|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated
 73. Source assignments for YCbCr2RGB:u8|MAC_3:u2|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult1|dffpipe_b3c:pre_result
 74. Source assignments for YCbCr2RGB:u8|MAC_3:u2|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult2|dffpipe_b3c:pre_result
 75. Source assignments for YCbCr2RGB:u8|MAC_3:u2|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult3|dffpipe_b3c:pre_result
 76. Source assignments for Line_Buffer:u10|altshift_taps:altshift_taps_component|shift_taps_k0r:auto_generated|altsyncram_q0c1:altsyncram2