count_5s.hier_info

我EDA课程设计做的用VHDL 写的智能电子密码锁

|COUNT_5S
CLK => COUNT[12].CLK
CLK => COUNT[11].CLK
CLK => COUNT[10].CLK
CLK => COUNT[9].CLK
CLK => COUNT[8].CLK
CLK => COUNT[7].CLK
CLK => COUNT[6].CLK
CLK => COUNT[5].CLK
CLK => COUNT[4].CLK
CLK => COUNT[3].CLK
CLK => COUNT[2].CLK
CLK => COUNT[1].CLK
CLK => COUNT[0].CLK
CLK => TIME_OUT~reg0.CLK
F5_IN => TIME_OUT~1.OUTPUTSELECT
F5_IN => COUNT~25.OUTPUTSELECT
F5_IN => COUNT~24.OUTPUTSELECT
F5_IN => COUNT~23.OUTPUTSELECT
F5_IN => COUNT~22.OUTPUTSELECT
F5_IN => COUNT~21.OUTPUTSELECT
F5_IN => COUNT~20.OUTPUTSELECT
F5_IN => COUNT~19.OUTPUTSELECT
F5_IN => COUNT~18.OUTPUTSELECT
F5_IN => COUNT~17.OUTPUTSELECT
F5_IN => COUNT~16.OUTPUTSELECT
F5_IN => COUNT~15.OUTPUTSELECT
F5_IN => COUNT~14.OUTPUTSELECT
F5_IN => COUNT~13.OUTPUTSELECT
TIME_OUT <= TIME_OUT~reg0.DB_MAX_OUTPUT_PORT_TYPE