60b0e134dbad001a1837b42d837911b3

FPGA中针对Biss通讯协议解码VHDL语言源码

#!/bin/sh
#
# generated.sh - shell script fragment - not very useful on its own
#
# Machine generated for a CPU named "cpu" as defined in:
# C:\altera\biss_01_03\small_cpu.ptf
#
# Generated: 2006-03-07 13:58:34.625

# DO NOT MODIFY THIS FILE
#
#   Changing this file will have subtle consequences
#   which will almost certainly lead to a nonfunctioning
#   system. If you do modify this file, be aware that your
#   changes will be overwritten and lost when this file
#   is generated again.
#
# DO NOT MODIFY THIS FILE

# This variable indicates where the PTF file for this design is located
ptf=C:\altera\biss_01_03\small_cpu.ptf

# This variable indicates whether there is a CPU debug core
nios2_debug_core=yes

# This variable indicates how to connect to the CPU debug core
nios2_instance=0

# These variables indicate what the System ID peripheral should hold
sidp=0x00000808
id=1793001889u
timestamp=1141734295u

# Include operating system specific parameters, if they are supplied.

if test -f /cygdrive/c/altera/kits/nios2_51/components/altera_hal/build/os.sh ; then
   . /cygdrive/c/altera/kits/nios2_51/components/altera_hal/build/os.sh
fi