506be634dbad001a1837b42d837911b3

FPGA中针对Biss通讯协议解码VHDL语言源码

# generated.gdb
#
# Machine generated for a CPU named "cpu" as defined in:
# C:\altera\biss_01_03\small_cpu.ptf
#
# Generated: 2006-03-07 13:58:36.421

# DO NOT MODIFY THIS FILE
#
#   Changing this file will have subtle consequences
#   which will almost certainly lead to a nonfunctioning
#   system. If you do modify this file, be aware that your
#   changes will be overwritten and lost when this file
#   is generated again.
#
# DO NOT MODIFY THIS FILE

# epcs_controller
mem 0x00001000 0x00001000+2048 cache

# cfi_flash
mem 0x00800000 0x00800000+8388608 cache

# sdram
mem 0x01000000 0x01000000+16777216 cache