rtctl.v

华大机顶盒源码

`include "OperMux.v"
`include "OperMux1.v" 
`include "InitSegRegTab.v"
`include "SaveSegReg.v" 
`include "WrAddrReg.v" 
`include "GetPCRSegAddr.v"
`include "PCRAddrReg.v"
`include "GetTxSegAddr.v"
`include "TxAddrReg.v"  
 
module RTCtl( CLKM, ResetN,  
              //RegTable
              AddrA, DIA, WEA, CLKA, DOA,
              AddrB, DIB, WEB, CLKB, DOB,
              //Init
              Init_Mem, Req_Mem,  Mem_Blk, Mem_Blk_Size, Mem_Sel, Mem_Fail, Init_Mem_End,
              //Save
              RxNewSeg, Seg_Num,Save_En, WrAddr, WrNewSeg,WrIncEn, WrNxtFr, CompNewSeg_End,
              //pcr
              Max_Seg_Num, PCRIncEn, PCRNxtFr, RdPCREnd, PcrAddr, PCR_En,
              //tx
              TxIncEn, TxAddr, Tx_En, ProgEnd                   
              );

input       CLKM;
input       ResetN;

input [7:0] DOB;              
input [7:0] DOA;

input        Init_Mem;
input [7:0]  Req_Mem;             
input [7:0]  Mem_Blk;
input [15:0] Mem_Blk_Size;
input [1:0]  Mem_Sel;
input        RxNewSeg;
input [11:0]  Seg_Num;
input        WrIncEn;
input        WrNxtFr;
input [11:0]   Max_Seg_Num; 
input         PCRIncEn; 
input         PCRNxtFr;
input         TxIncEn;

output [9:0]  AddrA;
output [7:0]  DIA;
output        WEA;
output        CLKA;
output [9:0]  AddrB;
output [7:0]  DIB;
output        WEB;
output        CLKB;
output        Save_En;
output [27:0] WrAddr;
output        WrNewSeg;
output        RdPCREnd;
output [27:0] PcrAddr; 
output        PCR_En;
output [27:0] TxAddr;
output        Tx_En;
output        ProgEnd;
output        Mem_Fail;
output        Init_Mem_End;
output        CompNewSeg_End; 

//OperMux
wire  [7:0] Init_DB;
wire  [9:0] Init_ADDR;            
wire        Init_WR;
wire  [7:0] Save_DB;
wire  [9:0] Save_ADDR;
wire        Save_WEN;
wire        Save_CLK;
//OperMux1
wire        rdpcr_oper;
wire  [9:0] PCRm_ADDR;            
wire        PCRm_RD;
wire  [7:0] TX_DB; 
wire  [9:0] TX_ADDR;
wire        TX_WEN;
wire        TX_CLK;
//InitSegRegTab
wire        init_oper;
//SaveSegReg
wire        RegBusy;
wire [27:0] WrEA; 
wire [11:0]  TxSeg;
wire [15:0] WrSA; 
wire        comp_oper;
//GetPCRSegAddr
wire [11:0]  PCRSeg; 
wire        FindPCRSegA_En;
wire        RdPCR_En;
wire [27:0] PCRSegAddr; 
wire        FindPCRSegA_End; 
//GetTxSegAddr
wire        FindTxSegA_En; 
wire [27:0] TxSegAddr;
wire        FindTxSegA_End;
wire        tx_oper; 

assign RegBusy = init_oper || rdpcr_oper || comp_oper || tx_oper; 


OperMux MuxA( //input
              .Init_Mem_End(Init_Mem_End), 
              .Init_DB(Init_DB), 
              .Init_WR(Init_WR), 
              .Init_ADDR(Init_ADDR),
              .Save_DB(Save_DB), 
              .Save_WEN(Save_WEN), 
              .Save_CLK(Save_CLK), 
              .Save_ADDR(Save_ADDR),
              //output
              .RT_DB(DIA), 
              .RT_ADDR(AddrA), 
              .RT_WEN(WEA), 
              .RT_CLK(CLKA)
              );

OperMux1 MuxB( //input
               .rdpcr_oper(rdpcr_oper), 
               .PCRm_RD(PCRm_RD), 
               .PCRm_ADDR(PCRm_ADDR),
               .TX_DB(TX_DB), 
               .TX_WEN(TX_WEN), 
               .TX_CLK(TX_CLK), 
               .TX_ADDR(TX_ADDR),
               //output 
               .RT_DB(DIB), 
               .RT_ADDR(AddrB), 
               .RT_WEN(WEB), 
               .RT_CLK(CLKB)
              );

InitSegRegTab U1( .CLKM(CLKM), 
                  .ResetN(ResetN), 
                  //input 
                  .Init_Mem(Init_Mem), 
                  .Req_Mem(Req_Mem), 
                  .Mem_Blk_Num(Mem_Blk), 
                  .Mem_Blk_Size(Mem_Blk_Size), 
                  .Mem_Sel(Mem_Sel), 
                  //output 
                  .Init_Mem_End(Init_Mem_End), 
                  .Mem_Fail(Mem_Fail),
                  .RT_DB(Init_DB), 
                  .RT_WR(Init_WR), 
                  .RT_WADDR(Init_ADDR), 
                  .init_oper(init_oper) 
                );

SaveSegReg U2( .CLKM(CLKM), 
               .ResetN(ResetN),
               //input
               .Init_Mem_End(Init_Mem_End),  
               .RegBusy(RegBusy), 
               .RxNewSeg(RxNewSeg), 
               .Seg_Num(Seg_Num),
               .EndAddr(WrEA), 
               .RT_RDB(DOA), 
               .TxSeg(TxSeg),
               //output
               .CompNewSeg_End(CompNewSeg_End), 
               .StartAddr(WrSA), 
               .Save_En(Save_En), 
               .RT_WDB(Save_DB), 
               .RT_WEN(Save_WEN), 
               .RT_CLK(Save_CLK), 
               .RT_ADDR(Save_ADDR),  
               .comp_oper(comp_oper)
             );


WrAddrReg  U3( .CLKM(CLKM), 
               .ResetN(ResetN), 
               //input 
               .IncEn(WrIncEn), 
               .NxtFrame(WrNxtFr), 
               .SetNewSeg(CompNewSeg_End), 
               .NewSegSA(WrSA), 
               //output 
               .WrAddr(WrAddr), 
               .New(WrNewSeg), 
               .EndAddr(WrEA) 
             );

GetPCRSegAddr U4( .CLKM(CLKM), 
                  .ResetN(ResetN),
                  //input 
                  .PCRSeg(PCRSeg), 
                  .FindPCRSegA_En(FindPCRSegA_En), 
                  .RegBusy(RegBusy), 
                  .RT_DB(DOB), 
                  .CompNewSeg_End(CompNewSeg_End), 
                  //output
                  .RdPCR_En(RdPCR_En), 
                  .SegAddr(PCRSegAddr), 
                  .FindPCRSegA_End(FindPCRSegA_End),
                  .rdpcr_oper(rdpcr_oper), 
                  .RT_RD(PCRm_RD), 
                  .RT_ADDR(PCRm_ADDR)
                );
 
PCRAddrReg U5( .CLKM(CLKM), 
               .ResetN(ResetN),
               //input 
               .IncEn(PCRIncEn), 
               .NxtFrame(PCRNxtFr), 
               .SegAddr(PCRSegAddr), 
               .Init_Mem_End(Init_Mem_End), 
               .FindPCRSegA_End(FindPCRSegA_End),
               .Max_Seg_Num(Max_Seg_Num), 
               //output 
               .PCRSeg(PCRSeg), 
               .FindPCRSegA_En(FindPCRSegA_En), 
               .RdPCREnd(RdPCREnd), 
               .PcrAddr(PcrAddr), 
               .PCR_En(PCR_En)
             ); 
             
GetTxSegAddr U6( .CLKM(CLKM), 
                 .ResetN(ResetN), 
                 //input 
                 .RegBusy(RegBusy), 
                 .TxSeg(TxSeg), 
                 .FindTxSegA_En(FindTxSegA_En), 
                 .RT_RDB(DOB), 
                 .RDPCR_EN(RdPCR_En),
                 //output
                 .SegAddr(TxSegAddr), 
                 .FindTxSegA_End(FindTxSegA_End),
                 .tx_oper(tx_oper), 
                 .RT_WDB(TX_DB), 
                 .RT_CLK(TX_CLK), 
                 .RT_WEN(TX_WEN), 
                 .RT_ADDR(TX_ADDR)
               );               
  
TxAddrReg U7( .CLKM(CLKM), 
              .ResetN(ResetN),
              //input 
              .IncEn(TxIncEn), 
              .RdPCR_En(RdPCR_En), 
              .SegAddr(TxSegAddr), 
              .FindTxSegA_End(FindTxSegA_End), 
              .Max_Seg_Num(Max_Seg_Num),
              //output
              .FindTxSegA_En(FindTxSegA_En),
              .TxAddr(TxAddr), 
              .Tx_En(Tx_En), 
              .TxSeg(TxSeg), 
              .ProgEnd(ProgEnd)
            );

endmodule