ex10sch.mfd

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· MFD 代码 · 共 439 行 · 第 1/2 页

MFD
439 行
字号
12
MACROCELL | 2 | 14 | &__A__13
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 4 | 2 | 16 | 2 | 7 | 2 | 14 | 2 | 12
INPUTS | 7 | &__A__16.FBK".LFBK  | &__A__14.FBK".LFBK  | &__A__13.FBK".LFBK  | \$Net00002_  | UCLK  | CLK  | &__A__15.FBK".LFBK
INPUTMC | 5 | 2 | 3 | 2 | 4 | 2 | 14 | 0 | 14 | 2 | 16
INPUTP | 2 | 43 | 44
EQ | 7 | 
    "&__A__13".T  =  "\$Net00002_" * "&__A__16.FBK".LFBK * 
	"&__A__15.FBK".LFBK * "&__A__14.FBK".LFBK
	+ "\$Net00002_" * "&__A__16.FBK".LFBK * 
	/"&__A__15.FBK".LFBK * /"&__A__14.FBK".LFBK * "&__A__13.FBK".LFBK
    "&__A__13".CLKF  =  UCLK
    "&__A__13".RSTF  =  /CLK * /"\$Net00002_"
    "&__A__13".PRLD  =  GND

MACROCELL | 3 | 14 | &__A__5
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 4 | 3 | 16 | 3 | 13 | 3 | 14 | 3 | 2
INPUTS | 7 | &__A__5.FBK".LFBK  | &__A__8  | &__A__6  | \$Net00002_  | \$Net00005_  | CLK  | &__A__7.FBK".LFBK
INPUTMC | 6 | 3 | 14 | 0 | 15 | 2 | 2 | 0 | 14 | 2 | 8 | 3 | 16
INPUTP | 1 | 44
EQ | 7 | 
    "&__A__5".T  =  "&__A__8" * "&__A__6" * "\$Net00002_" * 
	"&__A__7.FBK".LFBK
	+ "&__A__8" * /"&__A__6" * "\$Net00002_" * 
	/"&__A__7.FBK".LFBK * "&__A__5.FBK".LFBK
    "&__A__5".CLKF  =  "\$Net00005_"
    "&__A__5".RSTF  =  /CLK * /"\$Net00002_"
    "&__A__5".PRLD  =  GND

MACROCELL | 2 | 13 | &__A__9
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 4 | 3 | 4 | 2 | 17 | 2 | 8 | 2 | 13
INPUTS | 7 | &__A__12.FBK".LFBK  | &__A__10.FBK".LFBK  | &__A__9.FBK".LFBK  | \$Net00006_.FBK".LFBK  | \$Net00002_  | CLK  | &__A__11.FBK".LFBK
INPUTMC | 6 | 2 | 5 | 2 | 6 | 2 | 13 | 2 | 7 | 0 | 14 | 2 | 17
INPUTP | 1 | 44
EQ | 7 | 
    "&__A__9".T  =  "\$Net00002_" * "&__A__12.FBK".LFBK * 
	"&__A__10.FBK".LFBK * "&__A__11.FBK".LFBK
	+ "\$Net00002_" * "&__A__12.FBK".LFBK * 
	/"&__A__10.FBK".LFBK * "&__A__9.FBK".LFBK * /"&__A__11.FBK".LFBK
    "&__A__9".CLKF  =  "\$Net00006_.FBK".LFBK
    "&__A__9".RSTF  =  /CLK * /"\$Net00002_"
    "&__A__9".PRLD  =  GND

MACROCELL | 0 | 14 | \$Net00002_
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 36 | 2 | 17 | 2 | 16 | 3 | 17 | 3 | 16 | 2 | 5 | 2 | 3 | 3 | 6 | 3 | 5 | 2 | 6 | 2 | 4 | 3 | 10 | 2 | 2 | 2 | 8 | 2 | 7 | 3 | 13 | 3 | 15 | 2 | 14 | 3 | 14 | 2 | 13 | 3 | 3 | 2 | 9 | 2 | 11 | 2 | 10 | 2 | 12 | 3 | 1 | 2 | 15 | 3 | 0 | 3 | 4 | 3 | 9 | 3 | 11 | 3 | 8 | 3 | 2 | 0 | 16 | 0 | 15 | 0 | 17 | 0 | 14
INPUTS | 2 | CLK  | \$Net00002_.FBK".LFBK
INPUTMC | 1 | 0 | 14
INPUTP | 1 | 44
EQ | 3 | 
    "\$Net00002_"  :=  /"\$Net00002_.FBK".LFBK
    "\$Net00002_".CLKF  =  CLK
    "\$Net00002_".PRLD  =  GND

MACROCELL | 2 | 9 | LA<0>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | \$Net00002_  | &__A__16.FBK".LFBK
INPUTMC | 2 | 0 | 14 | 2 | 3
EQ | 3 | 
    "\$Net00009_"  :=  "&__A__16.FBK".LFBK
    "\$Net00009_".CLKF  =  /"\$Net00002_"
    "\$Net00009_".PRLD  =  GND

MACROCELL | 2 | 11 | LA<1>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | \$Net00002_  | &__A__15.FBK".LFBK
INPUTMC | 2 | 0 | 14 | 2 | 16
EQ | 3 | 
    "\$Net00046_"  :=  "&__A__15.FBK".LFBK
    "\$Net00046_".CLKF  =  /"\$Net00002_"
    "\$Net00046_".PRLD  =  GND

MACROCELL | 2 | 10 | LA<2>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | \$Net00002_  | &__A__14.FBK".LFBK
INPUTMC | 2 | 0 | 14 | 2 | 4
EQ | 3 | 
    "\$Net00047_"  :=  "&__A__14.FBK".LFBK
    "\$Net00047_".CLKF  =  /"\$Net00002_"
    "\$Net00047_".PRLD  =  GND

MACROCELL | 2 | 12 | LA<3>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | \$Net00002_  | &__A__13.FBK".LFBK
INPUTMC | 2 | 0 | 14 | 2 | 14
EQ | 3 | 
    "\$Net00042_"  :=  "&__A__13.FBK".LFBK
    "\$Net00042_".CLKF  =  /"\$Net00002_"
    "\$Net00042_".PRLD  =  GND

MACROCELL | 3 | 1 | LB<0>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | &__A__12  | \$Net00002_
INPUTMC | 2 | 2 | 5 | 0 | 14
EQ | 3 | 
    "\$Net00044_"  :=  "&__A__12"
    "\$Net00044_".CLKF  =  /"\$Net00002_"
    "\$Net00044_".PRLD  =  GND

MACROCELL | 2 | 15 | LB<1>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | \$Net00002_  | &__A__11.FBK".LFBK
INPUTMC | 2 | 0 | 14 | 2 | 17
EQ | 3 | 
    "\$Net00041_"  :=  "&__A__11.FBK".LFBK
    "\$Net00041_".CLKF  =  /"\$Net00002_"
    "\$Net00041_".PRLD  =  GND

MACROCELL | 3 | 0 | LB<2>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | &__A__10  | \$Net00002_
INPUTMC | 2 | 2 | 6 | 0 | 14
EQ | 3 | 
    "\$Net00043_"  :=  "&__A__10"
    "\$Net00043_".CLKF  =  /"\$Net00002_"
    "\$Net00043_".PRLD  =  GND

MACROCELL | 3 | 4 | LB<3>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | &__A__9  | \$Net00002_
INPUTMC | 2 | 2 | 13 | 0 | 14
EQ | 3 | 
    "\$Net00045_"  :=  "&__A__9"
    "\$Net00045_".CLKF  =  /"\$Net00002_"
    "\$Net00045_".PRLD  =  GND

MACROCELL | 3 | 9 | LC<0>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | &__A__8  | \$Net00002_
INPUTMC | 2 | 0 | 15 | 0 | 14
EQ | 3 | 
    "\$Net00050_"  :=  "&__A__8"
    "\$Net00050_".CLKF  =  /"\$Net00002_"
    "\$Net00050_".PRLD  =  GND

MACROCELL | 3 | 11 | LC<1>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | \$Net00002_  | &__A__7.FBK".LFBK
INPUTMC | 2 | 0 | 14 | 3 | 16
EQ | 3 | 
    "\$Net00048_"  :=  "&__A__7.FBK".LFBK
    "\$Net00048_".CLKF  =  /"\$Net00002_"
    "\$Net00048_".PRLD  =  GND

MACROCELL | 3 | 8 | LC<2>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | &__A__6  | \$Net00002_
INPUTMC | 2 | 2 | 2 | 0 | 14
EQ | 3 | 
    "\$Net00049_"  :=  "&__A__6"
    "\$Net00049_".CLKF  =  /"\$Net00002_"
    "\$Net00049_".PRLD  =  GND

MACROCELL | 3 | 2 | LC<3>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | \$Net00002_  | &__A__5.FBK".LFBK
INPUTMC | 2 | 0 | 14 | 3 | 14
EQ | 3 | 
    "\$Net00051_"  :=  "&__A__5.FBK".LFBK
    "\$Net00051_".CLKF  =  /"\$Net00002_"
    "\$Net00051_".PRLD  =  GND

MACROCELL | 3 | 3 | LD<0>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | &__A__4  | \$Net00002_
INPUTMC | 2 | 0 | 16 | 0 | 14
EQ | 3 | 
    "\$Net00039_"  :=  "&__A__4"
    "\$Net00039_".CLKF  =  /"\$Net00002_"
    "\$Net00039_".PRLD  =  GND

MACROCELL | 3 | 10 | LD<1>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | \$Net00002_  | &__A__3.FBK".LFBK
INPUTMC | 2 | 0 | 14 | 3 | 17
EQ | 3 | 
    "\$Net00037_"  :=  "&__A__3.FBK".LFBK
    "\$Net00037_".CLKF  =  /"\$Net00002_"
    "\$Net00037_".PRLD  =  GND

MACROCELL | 3 | 5 | LD<2>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | &__A__2  | \$Net00002_
INPUTMC | 2 | 0 | 17 | 0 | 14
EQ | 3 | 
    "\$Net00038_"  :=  "&__A__2"
    "\$Net00038_".CLKF  =  /"\$Net00002_"
    "\$Net00038_".PRLD  =  GND

MACROCELL | 3 | 6 | LD<3>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | \$Net00002_  | &__A__1.FBK".LFBK
INPUTMC | 2 | 0 | 14 | 3 | 15
EQ | 3 | 
    "\$Net00040_"  :=  "&__A__1.FBK".LFBK
    "\$Net00040_".CLKF  =  /"\$Net00002_"
    "\$Net00040_".PRLD  =  GND

PIN | CLK | 64 | 0 | N/A | 44 | 20 | 2 | 17 | 2 | 16 | 3 | 17 | 3 | 16 | 2 | 5 | 2 | 3 | 0 | 16 | 0 | 15 | 2 | 6 | 2 | 4 | 0 | 17 | 2 | 2 | 2 | 8 | 2 | 7 | 3 | 13 | 3 | 15 | 2 | 14 | 3 | 14 | 2 | 13 | 0 | 14
PIN | UCLK | 64 | 0 | N/A | 43 | 5 | 2 | 16 | 2 | 3 | 2 | 4 | 2 | 7 | 2 | 14
PIN | \$Net00009_ | 536871040 | 0 | N/A | 54
PIN | \$Net00046_ | 536871040 | 0 | N/A | 55
PIN | \$Net00047_ | 536871040 | 0 | N/A | 46
PIN | \$Net00042_ | 536871040 | 0 | N/A | 57
PIN | \$Net00044_ | 536871040 | 0 | N/A | 58
PIN | \$Net00041_ | 536871040 | 0 | N/A | 59
PIN | \$Net00043_ | 536871040 | 0 | N/A | 60
PIN | \$Net00045_ | 536871040 | 0 | N/A | 61
PIN | \$Net00050_ | 536871040 | 0 | N/A | 73
PIN | \$Net00048_ | 536871040 | 0 | N/A | 74
PIN | \$Net00049_ | 536871040 | 0 | N/A | 64
PIN | \$Net00051_ | 536871040 | 0 | N/A | 65
PIN | \$Net00039_ | 536871040 | 0 | N/A | 66
PIN | \$Net00037_ | 536871040 | 0 | N/A | 67
PIN | \$Net00038_ | 536871040 | 0 | N/A | 69
PIN | \$Net00040_ | 536871040 | 0 | N/A | 70
12

ex10sch.mfd - 源码说明

本页面展示了「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][」中的 ex10sch.mfd 源码文件，采用 MFD 编程语言编写，共 439 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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