ex25.mfd

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· MFD 代码 · 共 1,250 行 · 第 1/5 页
MFD
1,250 行
    "txd_cnt<3>".PRLD  =  GND
    txd_cnt<3>.EXP  =  "txcnt16<1>" * "txcnt16<0>" * "txcnt16<2>" * 
	"txcnt16<3>" * "txd_cnt<1>.FBK".LFBK * /"txd_cnt<2>.FBK".LFBK * 
	"txd_cnt<3>.FBK".LFBK

MACROCELL | 2 | 10 | baud_cnt<0>
ATTRIBUTES | 8618768 | 0
OUTPUTMC | 6 | 3 | 0 | 3 | 5 | 3 | 13 | 3 | 1 | 2 | 10 | 2 | 0
INPUTS | 2 | rst  | baud_cnt<0>.FBK".LFBK
INPUTMC | 1 | 2 | 10
INPUTP | 1 | 32
EQ | 4 | 
    "baud_cnt<0>"  :=  /"baud_cnt<0>.FBK".LFBK
    "baud_cnt<0>".CLKF  =  clk	;FCLK/GCK
    "baud_cnt<0>".RSTF  =  rst
    "baud_cnt<0>".PRLD  =  GND
GLOBALS | 1 | 2 | clk

MACROCELL | 3 | 8 | rxd_cnt<1>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 10 | 2 | 14 | 2 | 0 | 2 | 15 | 3 | 9 | 3 | 15 | 3 | 10 | 3 | 7 | 3 | 8 | 3 | 2 | 3 | 11
INPUTS | 11 | rxd_cnt<3>.FBK".LFBK  | rxcnt16<0>  | rxcnt16<1>  | rxcnt16<2>  | rxcnt16<3>  | rxd_cnt<1>.FBK".LFBK  | rxd_cnt<2>.FBK".LFBK  | N_bclk.FBK.LFBK  | rst  | txd_cnt<1>.EXP  | rxd_cnt<0>.FBK".LFBK
INPUTMC | 10 | 3 | 9 | 1 | 11 | 2 | 15 | 2 | 16 | 2 | 17 | 3 | 8 | 3 | 2 | 3 | 12 | 3 | 7 | 3 | 10
INPUTP | 1 | 32
EXPORTS | 1 | 3 | 9
IMPORTS | 1 | 3 | 7
EQ | 16 | 
    "rxd_cnt<1>".T  =  "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK * /"rxd_cnt<3>.FBK".LFBK
;Imported pterms FB4_8
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK * "rxd_cnt<1>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK * "rxd_cnt<2>.FBK".LFBK
    "rxd_cnt<1>".CLKF  =  N_bclk.FBK.LFBK
    "rxd_cnt<1>".RSTF  =  rst
    "rxd_cnt<1>".PRLD  =  GND
    rxd_cnt<1>.EXP  =  "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK * "rxd_cnt<1>.FBK".LFBK * 
	"rxd_cnt<2>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK * "rxd_cnt<3>.FBK".LFBK * 
	/"rxd_cnt<1>.FBK".LFBK * /"rxd_cnt<2>.FBK".LFBK

MACROCELL | 3 | 2 | rxd_cnt<2>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 10 | 2 | 14 | 2 | 0 | 2 | 15 | 3 | 3 | 3 | 15 | 3 | 10 | 3 | 7 | 3 | 8 | 3 | 9 | 3 | 11
INPUTS | 11 | rxd_cnt<1>.FBK".LFBK  | N_bclk.FBK.LFBK  | rxcnt16<0>  | rxcnt16<1>  | rxcnt16<2>  | rxcnt16<3>  | N_txd.FBK.LFBK  | rst  | txcnt16<0>  | txcnt16<3>  | rxd_cnt<0>.FBK".LFBK
INPUTMC | 10 | 3 | 8 | 3 | 12 | 1 | 11 | 2 | 15 | 2 | 16 | 2 | 17 | 3 | 3 | 2 | 12 | 0 | 8 | 3 | 10
INPUTP | 1 | 32
EXPORTS | 1 | 3 | 3
EQ | 7 | 
    "rxd_cnt<2>".T  =  "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK * "rxd_cnt<1>.FBK".LFBK
    "rxd_cnt<2>".CLKF  =  N_bclk.FBK.LFBK
    "rxd_cnt<2>".RSTF  =  rst
    "rxd_cnt<2>".PRLD  =  GND
    rxd_cnt<2>.EXP  =  /"txcnt16<0>" * /N_txd.FBK.LFBK
	+ /"txcnt16<3>" * /N_txd.FBK.LFBK

MACROCELL | 2 | 11 | txcnt16<1>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 27 | 3 | 15 | 3 | 3 | 0 | 1 | 3 | 7 | 3 | 1 | 3 | 6 | 0 | 0 | 0 | 8 | 3 | 17 | 0 | 17 | 0 | 14 | 0 | 13 | 0 | 9 | 0 | 6 | 0 | 4 | 0 | 7 | 0 | 2 | 0 | 3 | 0 | 5 | 0 | 10 | 0 | 11 | 0 | 12 | 0 | 15 | 0 | 16 | 3 | 0 | 3 | 4 | 3 | 16
INPUTS | 3 | bclk.PIN  | rst  | txcnt16<0>.FBK".LFBK
INPUTMC | 1 | 2 | 12
INPUTP | 2 | 77 | 32
EQ | 4 | 
    "txcnt16<1>".T  =  "txcnt16<0>.FBK".LFBK
    "txcnt16<1>".CLKF  =  bclk.PIN
    "txcnt16<1>".RSTF  =  rst
    "txcnt16<1>".PRLD  =  GND

MACROCELL | 2 | 0 | baud_cnt<2>
ATTRIBUTES | 4358928 | 0
OUTPUTMC | 5 | 3 | 0 | 3 | 5 | 3 | 1 | 3 | 13 | 2 | 17
INPUTS | 12 | baud_cnt<1>  | rxcnt16<1>.FBK".LFBK  | rst  | rxcnt16<0>  | rxcnt16<2>.FBK".LFBK  | rxcnt16<3>.FBK".LFBK  | rxd_sync.FBK.LFBK  | rxd_cnt<0>  | rxd_cnt<1>  | rxd_cnt<2>  | rxd_cnt<3>  | baud_cnt<0>.FBK".LFBK
INPUTMC | 11 | 3 | 5 | 2 | 15 | 1 | 11 | 2 | 16 | 2 | 17 | 2 | 14 | 3 | 10 | 3 | 8 | 3 | 2 | 3 | 9 | 2 | 10
INPUTP | 1 | 32
EXPORTS | 1 | 2 | 17
EQ | 10 | 
    "baud_cnt<2>".T  =  "baud_cnt<1>" * "baud_cnt<0>.FBK".LFBK
    "baud_cnt<2>".CLKF  =  clk	;FCLK/GCK
    "baud_cnt<2>".RSTF  =  rst
    "baud_cnt<2>".PRLD  =  GND
    baud_cnt<2>.EXP  =  "rxcnt16<0>" * "rxcnt16<1>.FBK".LFBK * 
	"rxcnt16<2>.FBK".LFBK * "rxcnt16<3>.FBK".LFBK
	+ /"rxd_cnt<0>" * /"rxd_cnt<1>" * /"rxd_cnt<2>" * 
	/"rxd_cnt<3>" * /"rxcnt16<3>.FBK".LFBK
	+ /"rxd_cnt<0>" * /"rxd_cnt<1>" * /"rxd_cnt<2>" * 
	/"rxd_cnt<3>" * rxd_sync.FBK.LFBK
GLOBALS | 1 | 2 | clk

MACROCELL | 1 | 11 | rxcnt16<0>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 30 | 3 | 12 | 3 | 10 | 3 | 8 | 3 | 2 | 3 | 9 | 2 | 15 | 2 | 16 | 2 | 17 | 3 | 7 | 2 | 0 | 3 | 11 | 3 | 15 | 1 | 12 | 1 | 0 | 1 | 11 | 1 | 2 | 1 | 17 | 1 | 16 | 1 | 13 | 1 | 9 | 1 | 8 | 1 | 1 | 1 | 3 | 1 | 5 | 1 | 4 | 1 | 7 | 1 | 6 | 1 | 10 | 1 | 14 | 1 | 15
INPUTS | 10 | rxd_cnt<0>  | rxd_shift<5>.FBK".LFBK  | rxcnt16<0>.FBK".LFBK  | bclk.PIN  | rxd_cnt<3>  | rxd_sync  | rst  | FC_0_.OUT  | FC_1_.OUT  | rxd_shift<4>.FBK".LFBK
INPUTMC | 6 | 3 | 10 | 1 | 13 | 1 | 11 | 3 | 9 | 2 | 14 | 1 | 12
INPUTP | 2 | 77 | 32
EXPORTS | 1 | 1 | 12
EQ | 9 | 
   /"rxcnt16<0>".T  =  /"rxd_cnt<0>" * /"rxd_cnt<3>" * rxd_sync * 
	FC_0_.OUT * /"rxcnt16<0>.FBK".LFBK
    "rxcnt16<0>".CLKF  =  bclk.PIN
    "rxcnt16<0>".RSTF  =  rst
    "rxcnt16<0>".PRLD  =  GND
    rxcnt16<0>.EXP  =  "rxd_cnt<0>" * /"rxd_cnt<3>" * FC_1_.OUT * 
	"rxcnt16<0>.FBK".LFBK * /"rxd_shift<4>.FBK".LFBK * "rxd_shift<5>.FBK".LFBK
	+ /"rxd_cnt<0>" * "rxd_cnt<3>" * FC_1_.OUT * 
	"rxcnt16<0>.FBK".LFBK * "rxd_shift<4>.FBK".LFBK * /"rxd_shift<5>.FBK".LFBK

MACROCELL | 2 | 15 | rxcnt16<1>
ATTRIBUTES | 8586032 | 0
OUTPUTMC | 12 | 3 | 10 | 3 | 8 | 3 | 2 | 3 | 9 | 3 | 12 | 3 | 11 | 3 | 7 | 3 | 15 | 2 | 16 | 2 | 0 | 2 | 15 | 2 | 17
INPUTS | 10 | rxcnt16<0>  | rxd_sync.FBK.LFBK  | rxd_cnt<0>  | rxd_cnt<1>  | rxd_cnt<2>  | rxd_cnt<3>  | bclk.PIN  | rst  | rxd_sync.EXP  | rxcnt16<1>.FBK".LFBK
INPUTMC | 8 | 1 | 11 | 2 | 14 | 3 | 10 | 3 | 8 | 3 | 2 | 3 | 9 | 2 | 14 | 2 | 15
INPUTP | 2 | 77 | 32
EXPORTS | 1 | 2 | 16
IMPORTS | 1 | 2 | 14
EQ | 10 | 
   /"rxcnt16<1>"  :=  "rxcnt16<0>" * "rxcnt16<1>.FBK".LFBK
	+ /"rxcnt16<0>" * /"rxcnt16<1>.FBK".LFBK
;Imported pterms FB3_15
	+ /"rxd_cnt<0>" * /"rxd_cnt<1>" * /"rxd_cnt<2>" * 
	/"rxd_cnt<3>" * rxd_sync.FBK.LFBK
    "rxcnt16<1>".CLKF  =  bclk.PIN
    "rxcnt16<1>".RSTF  =  rst
    "rxcnt16<1>".PRLD  =  GND
    rxcnt16<1>.EXP  =  /"rxd_cnt<0>" * /"rxd_cnt<1>" * /"rxd_cnt<2>" * 
	/"rxd_cnt<3>" * rxd_sync.FBK.LFBK

MACROCELL | 2 | 16 | rxcnt16<2>
ATTRIBUTES | 8586032 | 0
OUTPUTMC | 11 | 3 | 10 | 3 | 8 | 3 | 2 | 3 | 9 | 3 | 12 | 3 | 7 | 3 | 15 | 3 | 11 | 2 | 0 | 2 | 16 | 2 | 17
INPUTS | 6 | rxcnt16<0>  | rxcnt16<1>.FBK".LFBK  | bclk.PIN  | rxcnt16<1>.EXP  | rxcnt16<2>.FBK".LFBK  | rst
INPUTMC | 4 | 1 | 11 | 2 | 15 | 2 | 15 | 2 | 16
INPUTP | 2 | 77 | 32
IMPORTS | 1 | 2 | 15
EQ | 10 | 
   /"rxcnt16<2>"  :=  /"rxcnt16<0>" * /"rxcnt16<2>.FBK".LFBK
	+ /"rxcnt16<1>.FBK".LFBK * /"rxcnt16<2>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>.FBK".LFBK * 
	"rxcnt16<2>.FBK".LFBK
;Imported pterms FB3_16
	+ /"rxd_cnt<0>" * /"rxd_cnt<1>" * /"rxd_cnt<2>" * 
	/"rxd_cnt<3>" * rxd_sync.FBK.LFBK
    "rxcnt16<2>".CLKF  =  bclk.PIN
    "rxcnt16<2>".RSTF  =  rst
    "rxcnt16<2>".PRLD  =  GND

MACROCELL | 2 | 17 | rxcnt16<3>
ATTRIBUTES | 8586032 | 0
OUTPUTMC | 10 | 3 | 10 | 3 | 8 | 3 | 2 | 3 | 9 | 3 | 7 | 3 | 15 | 3 | 11 | 3 | 12 | 2 | 0 | 2 | 17
INPUTS | 7 | rxcnt16<0>  | rxcnt16<1>.FBK".LFBK  | rxcnt16<2>.FBK".LFBK  | bclk.PIN  | baud_cnt<2>.EXP  | rxcnt16<3>.FBK".LFBK  | rst
INPUTMC | 5 | 1 | 11 | 2 | 15 | 2 | 16 | 2 | 0 | 2 | 17
INPUTP | 2 | 77 | 32
IMPORTS | 1 | 2 | 0
EQ | 13 | 
   /"rxcnt16<3>"  :=  /"rxcnt16<0>" * /"rxcnt16<3>.FBK".LFBK
	+ /"rxcnt16<1>.FBK".LFBK * /"rxcnt16<3>.FBK".LFBK
	+ /"rxcnt16<2>.FBK".LFBK * /"rxcnt16<3>.FBK".LFBK
;Imported pterms FB3_1
	+ "rxcnt16<0>" * "rxcnt16<1>.FBK".LFBK * 
	"rxcnt16<2>.FBK".LFBK * "rxcnt16<3>.FBK".LFBK
	+ /"rxd_cnt<0>" * /"rxd_cnt<1>" * /"rxd_cnt<2>" * 
	/"rxd_cnt<3>" * /"rxcnt16<3>.FBK".LFBK
	+ /"rxd_cnt<0>" * /"rxd_cnt<1>" * /"rxd_cnt<2>" * 
	/"rxd_cnt<3>" * rxd_sync.FBK.LFBK
    "rxcnt16<3>".CLKF  =  bclk.PIN
    "rxcnt16<3>".RSTF  =  rst
    "rxcnt16<3>".PRLD  =  GND

MACROCELL | 3 | 9 | rxd_cnt<3>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 25 | 1 | 0 | 1 | 6 | 1 | 10 | 1 | 11 | 2 | 14 | 2 | 15 | 2 | 0 | 1 | 16 | 1 | 2 | 1 | 17 | 1 | 15 | 1 | 12 | 1 | 8 | 1 | 9 | 1 | 7 | 1 | 14 | 1 | 13 | 1 | 1 | 1 | 3 | 1 | 5 | 1 | 4 | 3 | 10 | 3 | 12 | 3 | 15 | 3 | 8
INPUTS | 10 | rxd_cnt<1>.FBK".LFBK  | rxcnt16<0>  | rxcnt16<1>  | rxcnt16<2>  | rxcnt16<3>  | rxd_cnt<2>.FBK".LFBK  | N_bclk.FBK.LFBK  | rxd_cnt<1>.EXP  | rst  | rxd_cnt<0>.FBK".LFBK
INPUTMC | 9 | 3 | 8 | 1 | 11 | 2 | 15 | 2 | 16 | 2 | 17 | 3 | 2 | 3 | 12 | 3 | 8 | 3 | 10
INPUTP | 1 | 32
EXPORTS | 1 | 3 | 10
IMPORTS | 1 | 3 | 8
EQ | 16 | 
    "rxd_cnt<3>".T  =  ;Imported pterms FB4_9
	  "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK * "rxd_cnt<1>.FBK".LFBK * 
	"rxd_cnt<2>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK * "rxd_cnt<3>.FBK".LFBK * 
	/"rxd_cnt<1>.FBK".LFBK * /"rxd_cnt<2>.FBK".LFBK
    "rxd_cnt<3>".CLKF  =  N_bclk.FBK.LFBK
    "rxd_cnt<3>".RSTF  =  rst
    "rxd_cnt<3>".PRLD  =  GND
    rxd_cnt<3>.EXP  =  "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<1>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<2>.FBK".LFBK

MACROCELL | 3 | 4 | baud_cnt<3>
ATTRIBUTES | 4424464 | 0
OUTPUTMC | 5 | 3 | 3 | 3 | 1 | 3 | 5 | 3 | 0 | 3 | 13
INPUTS | 11 | txd_shift<0>.FBK".LFBK  | txcnt16<1>  | txcnt16<0>  | txcnt16<2>  | txcnt16<3>  | rst  | txd_cnt<1>.FBK".LFBK  | txd_cnt<3>.FBK".LFBK  | txd_cnt<0>  | baud_cnt<1>.EXP  | txd_cnt<2>.FBK".LFBK
INPUTMC | 10 | 3 | 17 | 2 | 11 | 2 | 12 | 0 | 0 | 0 | 8 | 3 | 7 | 3 | 6 | 0 | 2 | 3 | 5 | 3 | 1
INPUTP | 1 | 32
EXPORTS | 1 | 3 | 3
IMPORTS | 1 | 3 | 5
EQ | 19 | 
    "baud_cnt<3>".T  =  ;Imported pterms FB4_6
	  "baud_cnt<0>" * "baud_cnt<2>" * 
	"baud_cnt<1>.FBK".LFBK
	+ "baud_cnt<0>" * /"baud_cnt<2>" * 
	/"baud_cnt<1>.FBK".LFBK * "baud_cnt<3>.FBK".LFBK * "baud_cnt<4>.FBK".LFBK
    "baud_cnt<3>".CLKF  =  clk	;FCLK/GCK
    "baud_cnt<3>".RSTF  =  rst
    "baud_cnt<3>".PRLD  =  GND
    baud_cnt<3>.EXP  =  "txcnt16<1>" * "txcnt16<0>" * "txcnt16<2>" * 
	"txcnt16<3>" * "txd_cnt<2>.FBK".LFBK * /"txd_shift<0>.FBK".LFBK
	+ "txcnt16<1>" * "txcnt16<0>" * "txcnt16<2>" * 
	"txcnt16<3>" * "txd_cnt<1>.FBK".LFBK * /"txd_cnt<3>.FBK".LFBK * 
	/"txd_shift<0>.FBK".LFBK
	+ "txcnt16<1>" * "txcnt16<0>" * "txcnt16<2>" * 
	"txcnt16<3>" * /"txd_cnt<1>.FBK".LFBK * "txd_cnt<3>.FBK".LFBK * 
	/"txd_shift<0>.FBK".LFBK
	+ "txd_cnt<0>" * "txcnt16<1>" * "txcnt16<0>" * 
	"txcnt16<2>" * "txcnt16<3>" * /"txd_cnt<1>.FBK".LFBK * 
	/"txd_cnt<2>.FBK".LFBK * /"txd_cnt<3>.FBK".LFBK
GLOBALS | 1 | 2 | clk

MACROCELL | 1 | 2 | rxd_shift<1>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 6 | 3 | 12 | 3 | 11 | 3 | 10 | 1 | 2 | 1 | 1 | 1 | 3
INPUTS | 10 | FC_1_.OUT  | rxd_shift<1>.FBK".LFBK  | N_rbuf<2>.EXP  | rxcnt16<0>.FBK".LFBK  | rxd_shift<2>.FBK".LFBK  | bclk.PIN  | rxd_cnt<0>  | rxd_cnt<3>  | rst  | FC_0_.OUT
INPUTMC | 6 | 1 | 2 | 1 | 3 | 1 | 11 | 1 | 17 | 3 | 10 | 3 | 9
INPUTP | 2 | 77 | 32
IMPORTS | 1 | 1 | 3
EQ | 16 | 
    "rxd_shift<1>".T  =  /FC_0_.OUT * FC_1_.OUT * "rxcnt16<0>.FBK".LFBK * 
	"rxd_shift<2>.FBK".LFBK * /"rxd_shift<1>.FBK".LFBK
	+ /FC_0_.OUT * FC_1_.OUT * "rxcnt16<0>.FBK".LFBK * 
	/"rxd_shift<2>.FBK".LFBK * "rxd_shift<1>.FBK".LFBK
	+ "rxd_cnt<0>" * /"rxd_cnt<3>" * FC_1_.OUT * 
	"rxcnt16<0>.FBK".LFBK * /"rxd_shift<2>.FBK".LFBK * "rxd_shift<1>.FBK".LFBK
;Imported pterms FB2_4
	+ "rxd_cnt<0>" * /"rxd_cnt<3>" * FC_1_.OUT * 
	"rxcnt16<0>.FBK".LFBK * "rxd_shift<2>.FBK".LFBK * /"rxd_shift<1>.FBK".LFBK
	+ /"rxd_cnt<0>" * "rxd_cnt<3>" * FC_1_.OUT * 
	"rxcnt16<0>.FBK".LFBK * "rxd_shift<2>.FBK".LFBK * /"rxd_shift<1>.FBK".LFBK
	+ /"rxd_cnt<0>" * "rxd_cnt<3>" * FC_1_.OUT * 
	"rxcnt16<0>.FBK".LFBK * /"rxd_shift<2>.FBK".LFBK * "rxd_shift<1>.FBK".LFBK
    "rxd_shift<1>".CLKF  =  bclk.PIN
    "rxd_shift<1>".RSTF  =  rst
ex25.mfd - 源码说明

本页面展示了「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][」中的 ex25.mfd 源码文件，采用 MFD 编程语言编写，共 1,250 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。
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