ex25.mfd

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· MFD 代码 · 共 1,250 行 · 第 1/5 页

MFD
1,250 行
字号
12345
MDF Database:  version 1.0
MDF_INFO | ex25 | XC9572-7-PC84
MACROCELL | 3 | 12 | N_bclk
ATTRIBUTES | 4686610 | 0
OUTPUTMC | 13 | 3 | 11 | 3 | 15 | 3 | 3 | 3 | 10 | 3 | 7 | 3 | 1 | 3 | 6 | 3 | 8 | 3 | 2 | 3 | 9 | 3 | 17 | 3 | 16 | 3 | 13
INPUTS | 10 | rxd_cnt<3>.FBK".LFBK  | rxcnt16<0>  | rxcnt16<1>  | rxcnt16<2>  | rxcnt16<3>  | rxd_shift<0>.FBK".LFBK  | rst  | rxd_shift<1>  | EXP10_.EXP  | rxd_cnt<0>.FBK".LFBK
INPUTMC | 9 | 3 | 9 | 1 | 11 | 2 | 15 | 2 | 16 | 2 | 17 | 3 | 11 | 1 | 2 | 3 | 13 | 3 | 10
INPUTP | 1 | 32
EXPORTS | 1 | 3 | 11
IMPORTS | 1 | 3 | 13
EQ | 22 | 
    bclk.T  =  ;Imported pterms FB4_14
	  "baud_cnt<0>" * "baud_cnt<2>" * N_bclk.FBK.LFBK * 
	"baud_cnt<1>.FBK".LFBK * "baud_cnt<3>.FBK".LFBK * "baud_cnt<4>.FBK".LFBK
	+ "baud_cnt<0>" * /"baud_cnt<2>" * N_bclk.FBK.LFBK * 
	/"baud_cnt<1>.FBK".LFBK * "baud_cnt<3>.FBK".LFBK * "baud_cnt<4>.FBK".LFBK
	+ "baud_cnt<0>" * /"baud_cnt<2>" * /N_bclk.FBK.LFBK * 
	"baud_cnt<1>.FBK".LFBK * "baud_cnt<3>.FBK".LFBK * /"baud_cnt<4>.FBK".LFBK
    bclk.CLKF  =  clk	;FCLK/GCK
    bclk.RSTF  =  rst
    bclk.PRLD  =  GND
    N_bclk.EXP  =  "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_shift<1>" * "rxd_cnt<0>.FBK".LFBK * 
	/"rxd_cnt<3>.FBK".LFBK * /"rxd_shift<0>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_shift<1>" * /"rxd_cnt<0>.FBK".LFBK * 
	"rxd_cnt<3>.FBK".LFBK * /"rxd_shift<0>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * /"rxd_shift<1>" * "rxd_cnt<0>.FBK".LFBK * 
	/"rxd_cnt<3>.FBK".LFBK * "rxd_shift<0>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * /"rxd_shift<1>" * /"rxd_cnt<0>.FBK".LFBK * 
	"rxd_cnt<3>.FBK".LFBK * "rxd_shift<0>.FBK".LFBK
GLOBALS | 1 | 2 | clk

MACROCELL | 3 | 15 | N_xmit_done
ATTRIBUTES | 4653874 | 0
OUTPUTMC | 2 | 3 | 16 | 3 | 15
INPUTS | 21 | txd_cnt<1>.FBK".LFBK  | txd_cnt<0>  | txd_cnt<2>.FBK".LFBK  | txd_cnt<3>.FBK".LFBK  | N_bclk.FBK.LFBK  | txcnt16<1>  | txcnt16<0>  | txcnt16<2>  | txcnt16<3>  | rxd_cnt<0>.FBK".LFBK  | rst  | rxd_cnt<1>.FBK".LFBK  | rxd_cnt<2>.FBK".LFBK  | rxd_cnt<3>.FBK".LFBK  | rxcnt16<0>  | rxcnt16<1>  | rxcnt16<2>  | rxcnt16<3>  | rxd_shift<0>.FBK".LFBK  | N_rbuf<0>.FBK".LFBK  | N_xmit_done.FBK.LFBK
INPUTMC | 20 | 3 | 7 | 0 | 2 | 3 | 1 | 3 | 6 | 3 | 12 | 2 | 11 | 2 | 12 | 0 | 0 | 0 | 8 | 3 | 10 | 3 | 8 | 3 | 2 | 3 | 9 | 1 | 11 | 2 | 15 | 2 | 16 | 2 | 17 | 3 | 11 | 3 | 16 | 3 | 15
INPUTP | 1 | 32
EXPORTS | 1 | 3 | 16
EQ | 14 | 
    xmit_done.T  =  /"txd_cnt<0>" * "txcnt16<1>" * "txcnt16<0>" * 
	"txcnt16<2>" * "txcnt16<3>" * /N_xmit_done.FBK.LFBK * 
	"txd_cnt<1>.FBK".LFBK * /"txd_cnt<2>.FBK".LFBK * "txd_cnt<3>.FBK".LFBK
    xmit_done.CLKF  =  N_bclk.FBK.LFBK
    xmit_done.RSTF  =  rst
    xmit_done.PRLD  =  GND
    N_xmit_done.EXP  =  /rst * "rxcnt16<0>" * "rxcnt16<1>" * 
	"rxcnt16<2>" * "rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK * 
	"rxd_cnt<3>.FBK".LFBK * "rxd_shift<0>.FBK".LFBK * /"rxd_cnt<1>.FBK".LFBK * 
	/"rxd_cnt<2>.FBK".LFBK * /"N_rbuf<0>.FBK".LFBK
	+ /rst * "rxcnt16<0>" * "rxcnt16<1>" * 
	"rxcnt16<2>" * "rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK * 
	"rxd_cnt<3>.FBK".LFBK * /"rxd_shift<0>.FBK".LFBK * /"rxd_cnt<1>.FBK".LFBK * 
	/"rxd_cnt<2>.FBK".LFBK * "N_rbuf<0>.FBK".LFBK

MACROCELL | 1 | 0 | N_rec_ready
ATTRIBUTES | 4653874 | 0
OUTPUTMC | 3 | 1 | 17 | 1 | 0 | 1 | 1
INPUTS | 11 | rxcnt16<0>.FBK".LFBK  | FC_1_.OUT  | rxd_shift<2>.FBK".LFBK  | rxd_shift<3>.FBK".LFBK  | bclk.PIN  | N_rbuf<1>.EXP  | N_rec_ready.FBK.LFBK  | rxd_cnt<0>  | rxd_cnt<3>  | rst  | FC_0_.OUT
INPUTMC | 7 | 1 | 11 | 1 | 17 | 1 | 16 | 1 | 1 | 1 | 0 | 3 | 10 | 3 | 9
INPUTP | 2 | 77 | 32
EXPORTS | 1 | 1 | 17
IMPORTS | 1 | 1 | 1
EQ | 14 | 
    rec_ready.T  =  /FC_0_.OUT * FC_1_.OUT * N_rec_ready.FBK.LFBK * 
	"rxcnt16<0>.FBK".LFBK
	+ "rxd_cnt<0>" * /"rxd_cnt<3>" * FC_1_.OUT * 
	N_rec_ready.FBK.LFBK * "rxcnt16<0>.FBK".LFBK
;Imported pterms FB2_2
	+ /"rxd_cnt<0>" * "rxd_cnt<3>" * FC_1_.OUT * 
	N_rec_ready.FBK.LFBK * "rxcnt16<0>.FBK".LFBK
	+ "rxd_cnt<0>" * "rxd_cnt<3>" * FC_0_.OUT * 
	FC_1_.OUT * /N_rec_ready.FBK.LFBK * "rxcnt16<0>.FBK".LFBK
    rec_ready.CLKF  =  bclk.PIN
    rec_ready.RSTF  =  rst
    rec_ready.PRLD  =  GND
    N_rec_ready.EXP  =  /"rxd_cnt<0>" * "rxd_cnt<3>" * FC_1_.OUT * 
	"rxcnt16<0>.FBK".LFBK * /"rxd_shift<2>.FBK".LFBK * "rxd_shift<3>.FBK".LFBK

MACROCELL | 3 | 3 | N_txd
ATTRIBUTES | 8848290 | 0
OUTPUTMC | 2 | 3 | 3 | 3 | 2
INPUTS | 11 | txd_cnt<0>  | txcnt16<1>  | txcnt16<0>  | txcnt16<2>  | txcnt16<3>  | N_txd.FBK.LFBK  | N_bclk.FBK.LFBK  | rxd_cnt<2>.EXP  | baud_cnt<3>.EXP  | txd_shift<0>.FBK".LFBK  | rst
INPUTMC | 10 | 0 | 2 | 2 | 11 | 2 | 12 | 0 | 0 | 0 | 8 | 3 | 3 | 3 | 12 | 3 | 2 | 3 | 4 | 3 | 17
INPUTP | 1 | 32
IMPORTS | 2 | 3 | 2 | 3 | 4
EQ | 22 | 
   /txd  :=  /"txcnt16<1>" * /N_txd.FBK.LFBK
	+ /"txcnt16<2>" * /N_txd.FBK.LFBK
	+ "txd_cnt<0>" * "txcnt16<1>" * "txcnt16<0>" * 
	"txcnt16<2>" * "txcnt16<3>" * /"txd_shift<0>.FBK".LFBK
;Imported pterms FB4_3
	+ /"txcnt16<0>" * /N_txd.FBK.LFBK
	+ /"txcnt16<3>" * /N_txd.FBK.LFBK
;Imported pterms FB4_5
	+ "txcnt16<1>" * "txcnt16<0>" * "txcnt16<2>" * 
	"txcnt16<3>" * "txd_cnt<2>.FBK".LFBK * /"txd_shift<0>.FBK".LFBK
	+ "txcnt16<1>" * "txcnt16<0>" * "txcnt16<2>" * 
	"txcnt16<3>" * "txd_cnt<1>.FBK".LFBK * /"txd_cnt<3>.FBK".LFBK * 
	/"txd_shift<0>.FBK".LFBK
	+ "txcnt16<1>" * "txcnt16<0>" * "txcnt16<2>" * 
	"txcnt16<3>" * /"txd_cnt<1>.FBK".LFBK * "txd_cnt<3>.FBK".LFBK * 
	/"txd_shift<0>.FBK".LFBK
	+ "txd_cnt<0>" * "txcnt16<1>" * "txcnt16<0>" * 
	"txcnt16<2>" * "txcnt16<3>" * /"txd_cnt<1>.FBK".LFBK * 
	/"txd_cnt<2>.FBK".LFBK * /"txd_cnt<3>.FBK".LFBK
    txd.CLKF  =  N_bclk.FBK.LFBK
    txd.SETF  =  rst
    txd.PRLD  =  GND

MACROCELL | 0 | 2 | txd_cnt<0>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 22 | 3 | 15 | 3 | 3 | 3 | 4 | 3 | 7 | 3 | 1 | 3 | 6 | 3 | 16 | 3 | 0 | 0 | 3 | 0 | 2 | 0 | 0 | 0 | 8 | 0 | 13 | 0 | 4 | 0 | 7 | 0 | 1 | 0 | 5 | 0 | 10 | 0 | 11 | 0 | 12 | 0 | 15 | 0 | 16
INPUTS | 14 | txcnt16<2>.FBK".LFBK  | txd_cnt<3>  | txcnt16<1>  | txcnt16<0>  | txcnt16<3>.FBK".LFBK  | txd_shift<6>.FBK".LFBK  | txd_shift<7>.FBK".LFBK  | bclk.PIN  | txd_cnt<1>  | txd_cnt<2>  | rst  | tbuf<6>  | EXP0_.EXP  | txd_cnt<0>.FBK".LFBK
INPUTMC | 11 | 0 | 0 | 3 | 6 | 2 | 11 | 2 | 12 | 0 | 8 | 0 | 4 | 0 | 7 | 3 | 7 | 3 | 1 | 0 | 1 | 0 | 2
INPUTP | 3 | 77 | 32 | 55
EXPORTS | 1 | 0 | 3
IMPORTS | 1 | 0 | 1
EQ | 24 | 
    "txd_cnt<0>".T  =  ;Imported pterms FB1_2
	  "txd_cnt<2>" * "txcnt16<1>" * "txcnt16<0>" * 
	"txcnt16<2>.FBK".LFBK * "txcnt16<3>.FBK".LFBK
	+ "txcnt16<1>" * "txcnt16<0>" * 
	"txd_cnt<0>.FBK".LFBK * "txcnt16<2>.FBK".LFBK * "txcnt16<3>.FBK".LFBK
	+ "txd_cnt<1>" * /"txd_cnt<3>" * "txcnt16<1>" * 
	"txcnt16<0>" * "txcnt16<2>.FBK".LFBK * "txcnt16<3>.FBK".LFBK
	+ /"txd_cnt<1>" * "txd_cnt<3>" * "txcnt16<1>" * 
	"txcnt16<0>" * "txcnt16<2>.FBK".LFBK * "txcnt16<3>.FBK".LFBK
	+ /"txd_cnt<3>" * "txcnt16<1>" * "txcnt16<0>" * 
	xmit_cmd * "txcnt16<2>.FBK".LFBK * "txcnt16<3>.FBK".LFBK * 
	/xmit_done.PIN
    "txd_cnt<0>".CLKF  =  bclk.PIN
    "txd_cnt<0>".RSTF  =  rst
    "txd_cnt<0>".PRLD  =  GND
    txd_cnt<0>.EXP  =  "txd_cnt<3>" * "txcnt16<1>" * "txcnt16<0>" * 
	"txd_cnt<0>.FBK".LFBK * "txcnt16<2>.FBK".LFBK * "txcnt16<3>.FBK".LFBK * 
	/"txd_shift<6>.FBK".LFBK * "txd_shift<7>.FBK".LFBK
	+ /"txd_cnt<1>" * /"txd_cnt<2>" * /"txd_cnt<3>" * 
	"txcnt16<1>" * "txcnt16<0>" * "tbuf<6>" * "txd_cnt<0>.FBK".LFBK * 
	"txcnt16<2>.FBK".LFBK * "txcnt16<3>.FBK".LFBK * /"txd_shift<6>.FBK".LFBK
	+ /"txd_cnt<1>" * /"txd_cnt<2>" * /"txd_cnt<3>" * 
	"txcnt16<1>" * "txcnt16<0>" * /"tbuf<6>" * "txd_cnt<0>.FBK".LFBK * 
	"txcnt16<2>.FBK".LFBK * "txcnt16<3>.FBK".LFBK * "txd_shift<6>.FBK".LFBK

MACROCELL | 3 | 10 | rxd_cnt<0>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 29 | 1 | 0 | 1 | 14 | 1 | 6 | 1 | 10 | 1 | 11 | 2 | 14 | 2 | 15 | 2 | 0 | 1 | 13 | 1 | 2 | 1 | 17 | 1 | 15 | 1 | 12 | 1 | 8 | 1 | 9 | 1 | 7 | 1 | 4 | 1 | 16 | 1 | 1 | 1 | 3 | 1 | 5 | 3 | 11 | 3 | 12 | 3 | 15 | 3 | 10 | 3 | 7 | 3 | 8 | 3 | 2 | 3 | 9
INPUTS | 13 | rxd_cnt<1>.FBK".LFBK  | rxd_cnt<2>.FBK".LFBK  | rxd_cnt<3>.FBK".LFBK  | rxcnt16<0>  | rxcnt16<1>  | rxcnt16<2>  | rxcnt16<3>  | N_bclk.FBK.LFBK  | rxd_shift<0>.FBK".LFBK  | rst  | rxd_shift<1>  | rxd_cnt<3>.EXP  | rxd_cnt<0>.FBK".LFBK
INPUTMC | 12 | 3 | 8 | 3 | 2 | 3 | 9 | 1 | 11 | 2 | 15 | 2 | 16 | 2 | 17 | 3 | 12 | 3 | 11 | 1 | 2 | 3 | 9 | 3 | 10
INPUTP | 1 | 32
EXPORTS | 1 | 3 | 11
IMPORTS | 1 | 3 | 9
EQ | 18 | 
    "rxd_cnt<0>".T  =  "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<3>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	/"rxcnt16<3>" * /"rxd_cnt<0>.FBK".LFBK * /"rxd_cnt<3>.FBK".LFBK * 
	/"rxd_cnt<1>.FBK".LFBK * /"rxd_cnt<2>.FBK".LFBK
;Imported pterms FB4_10
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<1>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<2>.FBK".LFBK
    "rxd_cnt<0>".CLKF  =  N_bclk.FBK.LFBK
    "rxd_cnt<0>".RSTF  =  rst
    "rxd_cnt<0>".PRLD  =  GND
    rxd_cnt<0>.EXP  =  "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_shift<1>" * /"rxd_shift<0>.FBK".LFBK * 
	"rxd_cnt<1>.FBK".LFBK

MACROCELL | 3 | 7 | txd_cnt<1>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 26 | 0 | 8 | 0 | 11 | 0 | 1 | 0 | 13 | 0 | 16 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 14 | 0 | 12 | 0 | 9 | 0 | 6 | 0 | 3 | 0 | 7 | 0 | 0 | 0 | 2 | 0 | 4 | 0 | 5 | 3 | 8 | 3 | 15 | 3 | 1 | 3 | 6 | 3 | 4 | 3 | 0 | 3 | 17 | 3 | 16
INPUTS | 15 | txd_cnt<0>  | txcnt16<1>  | txcnt16<0>  | txcnt16<2>  | txcnt16<3>  | rxd_cnt<1>.FBK".LFBK  | N_bclk.FBK.LFBK  | rxcnt16<0>  | rxd_cnt<2>.FBK".LFBK  | rst  | rxcnt16<1>  | rxcnt16<2>  | rxcnt16<3>  | txd_cnt<3>.EXP  | rxd_cnt<0>.FBK".LFBK
INPUTMC | 14 | 0 | 2 | 2 | 11 | 2 | 12 | 0 | 0 | 0 | 8 | 3 | 8 | 3 | 12 | 1 | 11 | 3 | 2 | 2 | 15 | 2 | 16 | 2 | 17 | 3 | 6 | 3 | 10
INPUTP | 1 | 32
EXPORTS | 1 | 3 | 8
IMPORTS | 1 | 3 | 6
EQ | 13 | 
    "txd_cnt<1>".T  =  "txd_cnt<0>" * "txcnt16<1>" * "txcnt16<0>" * 
	"txcnt16<2>" * "txcnt16<3>"
;Imported pterms FB4_7
	+ "txcnt16<1>" * "txcnt16<0>" * "txcnt16<2>" * 
	"txcnt16<3>" * "txd_cnt<1>.FBK".LFBK * /"txd_cnt<2>.FBK".LFBK * 
	"txd_cnt<3>.FBK".LFBK
    "txd_cnt<1>".CLKF  =  N_bclk.FBK.LFBK
    "txd_cnt<1>".RSTF  =  rst
    "txd_cnt<1>".PRLD  =  GND
    txd_cnt<1>.EXP  =  "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK * "rxd_cnt<1>.FBK".LFBK
	+ "rxcnt16<0>" * "rxcnt16<1>" * "rxcnt16<2>" * 
	"rxcnt16<3>" * "rxd_cnt<0>.FBK".LFBK * "rxd_cnt<2>.FBK".LFBK

MACROCELL | 3 | 1 | txd_cnt<2>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 19 | 0 | 15 | 0 | 10 | 0 | 1 | 0 | 11 | 0 | 12 | 0 | 2 | 0 | 17 | 0 | 14 | 0 | 13 | 0 | 9 | 0 | 6 | 0 | 4 | 0 | 7 | 0 | 0 | 3 | 0 | 3 | 15 | 3 | 6 | 3 | 4 | 3 | 17
INPUTS | 12 | txd_cnt<0>  | N_bclk.FBK.LFBK  | txcnt16<1>  | txcnt16<0>  | txcnt16<2>  | txcnt16<3>  | baud_cnt<1>.FBK".LFBK  | rst  | baud_cnt<3>.FBK".LFBK  | baud_cnt<0>  | baud_cnt<2>  | txd_cnt<1>.FBK".LFBK
INPUTMC | 11 | 0 | 2 | 3 | 12 | 2 | 11 | 2 | 12 | 0 | 0 | 0 | 8 | 3 | 5 | 3 | 4 | 2 | 10 | 2 | 0 | 3 | 7
INPUTP | 1 | 32
EXPORTS | 1 | 3 | 0
EQ | 7 | 
    "txd_cnt<2>".T  =  "txd_cnt<0>" * "txcnt16<1>" * "txcnt16<0>" * 
	"txcnt16<2>" * "txcnt16<3>" * "txd_cnt<1>.FBK".LFBK
    "txd_cnt<2>".CLKF  =  N_bclk.FBK.LFBK
    "txd_cnt<2>".RSTF  =  rst
    "txd_cnt<2>".PRLD  =  GND
    txd_cnt<2>.EXP  =  "baud_cnt<0>" * "baud_cnt<2>" * 
	"baud_cnt<1>.FBK".LFBK * "baud_cnt<3>.FBK".LFBK

MACROCELL | 3 | 5 | baud_cnt<1>
ATTRIBUTES | 4424464 | 0
OUTPUTMC | 6 | 2 | 0 | 3 | 4 | 3 | 1 | 3 | 5 | 3 | 0 | 3 | 13
INPUTS | 6 | baud_cnt<0>  | baud_cnt<3>.FBK".LFBK  | baud_cnt<2>  | baud_cnt<4>.FBK".LFBK  | rst  | baud_cnt<1>.FBK".LFBK
INPUTMC | 5 | 2 | 10 | 3 | 4 | 2 | 0 | 3 | 0 | 3 | 5
INPUTP | 1 | 32
EXPORTS | 1 | 3 | 4
EQ | 10 | 
   /"baud_cnt<1>".T  =  /"baud_cnt<0>"
	+ /"baud_cnt<2>" * /"baud_cnt<1>.FBK".LFBK * 
	"baud_cnt<3>.FBK".LFBK * "baud_cnt<4>.FBK".LFBK
    "baud_cnt<1>".CLKF  =  clk	;FCLK/GCK
    "baud_cnt<1>".RSTF  =  rst
    "baud_cnt<1>".PRLD  =  GND
    baud_cnt<1>.EXP  =  "baud_cnt<0>" * "baud_cnt<2>" * 
	"baud_cnt<1>.FBK".LFBK
	+ "baud_cnt<0>" * /"baud_cnt<2>" * 
	/"baud_cnt<1>.FBK".LFBK * "baud_cnt<3>.FBK".LFBK * "baud_cnt<4>.FBK".LFBK
GLOBALS | 1 | 2 | clk

MACROCELL | 3 | 6 | txd_cnt<3>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 25 | 0 | 10 | 0 | 13 | 0 | 1 | 0 | 15 | 0 | 16 | 0 | 11 | 0 | 17 | 0 | 14 | 0 | 12 | 0 | 9 | 0 | 6 | 0 | 3 | 0 | 7 | 0 | 0 | 0 | 2 | 0 | 4 | 0 | 5 | 0 | 8 | 3 | 7 | 3 | 15 | 3 | 6 | 3 | 4 | 3 | 0 | 3 | 17 | 3 | 16
INPUTS | 10 | txd_cnt<0>  | txd_cnt<2>.FBK".LFBK  | txd_cnt<3>.FBK".LFBK  | N_bclk.FBK.LFBK  | txcnt16<1>  | txcnt16<0>  | txcnt16<2>  | txcnt16<3>  | rst  | txd_cnt<1>.FBK".LFBK
INPUTMC | 9 | 0 | 2 | 3 | 1 | 3 | 6 | 3 | 12 | 2 | 11 | 2 | 12 | 0 | 0 | 0 | 8 | 3 | 7
INPUTP | 1 | 32
EXPORTS | 1 | 3 | 7
EQ | 12 | 
    "txd_cnt<3>".T  =  "txd_cnt<0>" * "txcnt16<1>" * "txcnt16<0>" * 
	"txcnt16<2>" * "txcnt16<3>" * "txd_cnt<1>.FBK".LFBK * 
	"txd_cnt<2>.FBK".LFBK
	+ /"txd_cnt<0>" * "txcnt16<1>" * "txcnt16<0>" * 
	"txcnt16<2>" * "txcnt16<3>" * "txd_cnt<1>.FBK".LFBK * 
	/"txd_cnt<2>.FBK".LFBK * "txd_cnt<3>.FBK".LFBK
    "txd_cnt<3>".CLKF  =  N_bclk.FBK.LFBK
    "txd_cnt<3>".RSTF  =  rst
12345

ex25.mfd - 源码说明

本页面展示了「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][」中的 ex25.mfd 源码文件，采用 MFD 编程语言编写，共 1,250 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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