time_sim.edn

[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][

            )
            (port IN2
              (direction INPUT)
            )
            (port IN3
              (direction INPUT)
            )
            (port IN4
              (direction INPUT)
            )
            (port IN5
              (direction INPUT)
            )
            (port IN6
              (direction INPUT)
            )
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_and16
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port IN0
              (direction INPUT)
            )
            (port IN1
              (direction INPUT)
            )
            (port IN2
              (direction INPUT)
            )
            (port IN3
              (direction INPUT)
            )
            (port IN4
              (direction INPUT)
            )
            (port IN5
              (direction INPUT)
            )
            (port IN6
              (direction INPUT)
            )
            (port IN7
              (direction INPUT)
            )
            (port IN8
              (direction INPUT)
            )
            (port IN9
              (direction INPUT)
            )
            (port IN10
              (direction INPUT)
            )
            (port IN11
              (direction INPUT)
            )
            (port IN12
              (direction INPUT)
            )
            (port IN13
              (direction INPUT)
            )
            (port IN14
              (direction INPUT)
            )
            (port IN15
              (direction INPUT)
            )
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_or5
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port IN0
              (direction INPUT)
            )
            (port IN1
              (direction INPUT)
            )
            (port IN2
              (direction INPUT)
            )
            (port IN3
              (direction INPUT)
            )
            (port IN4
              (direction INPUT)
            )
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_or6
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port IN0
              (direction INPUT)
            )
            (port IN1
              (direction INPUT)
            )
            (port IN2
              (direction INPUT)
            )
            (port IN3
              (direction INPUT)
            )
            (port IN4
              (direction INPUT)
            )
            (port IN5
              (direction INPUT)
            )
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_inv
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port IN
              (direction INPUT)
            )
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
  )

  (library ex25_lib
    (edifLevel 0)
    (technology (numberDefinition
      (scale 1 (E 1 -12) (unit TIME))))
    (cell ex25
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port clk
              (direction INPUT)
              (designator "10")
            )
            (port rst
              (direction INPUT)
              (designator "20")
            )
            (port (rename rbuf_5__ "rbuf<5>")
              (direction OUTPUT)
              (designator "72")
            )
            (port xmit_cmd
              (direction INPUT)
              (designator "23")
            )
            (port (rename rbuf_6__ "rbuf<6>")
              (direction OUTPUT)
              (designator "76")
            )
            (port (rename rbuf_7__ "rbuf<7>")
              (direction OUTPUT)
              (designator "77")
            )
            (port rxd
              (direction INPUT)
              (designator "56")
            )
            (port (rename tbuf_0__ "tbuf<0>")
              (direction INPUT)
              (designator "36")
            )
            (port (rename tbuf_1__ "tbuf<1>")
              (direction INPUT)
              (designator "33")
            )
            (port (rename tbuf_2__ "tbuf<2>")
              (direction INPUT)
              (designator "35")
            )
            (port bclk
              (direction OUTPUT)
              (designator "61")
            )
            (port (rename tbuf_3__ "tbuf<3>")
              (direction INPUT)
              (designator "37")
            )
            (port xmit_done
              (direction OUTPUT)
              (designator "62")
            )
            (port (rename tbuf_4__ "tbuf<4>")
              (direction INPUT)
              (designator "40")
            )
            (port rec_ready
              (direction OUTPUT)
              (designator "63")
            )
            (port (rename tbuf_5__ "tbuf<5>")
              (direction INPUT)
              (designator "39")
            )
            (port txd
              (direction OUTPUT)
              (designator "52")
            )
            (port (rename tbuf_6__ "tbuf<6>")
              (direction INPUT)
              (designator "41")
            )
            (port (rename rbuf_0__ "rbuf<0>")
              (direction OUTPUT)
              (designator "66")
            )
            (port (rename tbuf_7__ "tbuf<7>")
              (direction INPUT)
              (designator "43")
            )
            (port (rename rbuf_1__ "rbuf<1>")
              (direction OUTPUT)
              (designator "69")
            )
            (port (rename rbuf_2__ "rbuf<2>")
              (direction OUTPUT)
              (designator "68")
            )
            (port (rename rbuf_3__ "rbuf<3>")
              (direction OUTPUT)
              (designator "71")
            )
            (port (rename rbuf_4__ "rbuf<4>")
              (direction OUTPUT)
              (designator "70")
            )
            (designator "XC9572-7-PC84")
          )
          (contents
            (instance bclk_PAD
              (viewRef view_1 (cellRef x_opad (libraryRef SIMPRIMS)))
            )
            (instance bclk_12
              (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS)))
              (portInstance OUT
                (property RISE (integer 2500) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 2500) (unit TIME) (owner "Xilinx"))
              )
            )
            (instance N_bclk_Q_13
              (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS)))
            )
            (instance N_bclk_R_OR_PRLD_14
              (viewRef view_1 (cellRef x_or2 (libraryRef SIMPRIMS)))
            )
            (instance N_bclk_REG
              (viewRef view_1 (cellRef x_ff (libraryRef SIMPRIMS)))
              (property SUINHICLK (integer 1500) (unit TIME) (owner "Xilinx"))
              (property SUINLOCLK (integer 1500) (unit TIME) (owner "Xilinx"))
              (property HOLDINHICLK (integer 3000) (unit TIME) (owner "Xilinx"))
              (property HOLDINLOCLK (integer 3000) (unit TIME) (owner "Xilinx"))
              (property PWCLKHI (integer 4000) (unit TIME) (owner "Xilinx"))
              (property PWCLKLO (integer 4000) (unit TIME) (owner "Xilinx"))
              (portInstance RST
                (property RISE (integer 6000) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 6000) (unit TIME) (owner "Xilinx"))
              )
              (portInstance OUT
                (property RISE (integer 500) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 500) (unit TIME) (owner "Xilinx"))
              )
            )
            (instance VCC_ONE
              (viewRef view_1 (cellRef x_one (libraryRef SIMPRIMS)))
            )
            (instance N_bclk_RSTF_PT_0_15
              (viewRef view_1 (cellRef x_and2 (libraryRef SIMPRIMS)))
              (portInstance IN0
                (property RISE (integer 2000) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 2000) (unit TIME) (owner "Xilinx"))
              )
              (portInstance IN1
                (property RISE (integer 2000) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 2000) (unit TIME) (owner "Xilinx"))
              )
            )
            (instance N_bclk_RSTF_16
              (viewRef view_1 (cellRef x_or2 (libraryRef SIMPRIMS)))
            )
            (instance GND_ZERO
              (viewRef view_1 (cellRef x_zero (libraryRef SIMPRIMS)))
            )
            (instance N_bclk_D1_17
              (viewRef view_1 (cellRef x_or2 (libraryRef SIMPRIMS)))
            )
            (instance N_bclk_D2_PT_0_18
              (viewRef view_1 (cellRef x_and2 (libraryRef SIMPRIMS)))
            )
            (instance N_bclk_D2_19
              (viewRef view_1 (cellRef x_or2 (libraryRef SIMPRIMS)))
            )
            (instance N_bclk_D_20
              (viewRef view_1 (cellRef x_xor2 (libraryRef SIMPRIMS)))
              (portInstance IN1
                (property RISE (integer 3000) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 3000) (unit TIME) (owner "Xilinx"))
              )
            )
            (instance N_bclk_XOR
              (viewRef view_1 (cellRef x_xor2 (libraryRef SIMPRIMS)))
            )
            (instance N_bclk_EXP_PT_0_21
              (viewRef view_1 (cellRef x_and8 (libraryRef SIMPRIMS)))