time_sim.edn
来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· EDN 代码 · 共 1,634 行 · 第 1/5 页
EDN
1,634 行
(edif ex4 (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0)) (status (written (timestamp 2008 3 11 23 8 44) (program "Xilinx ngd2edif" (version "E.38")) (comment "Command line: -w -v fndtn ex4.nga time_sim.edn "))) (external SIMPRIMS (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit TIME)))) (cell x_opad (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port PAD (direction OUTPUT) ) ) ) ) (cell x_buf (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port IN (direction INPUT) ) (port OUT (direction OUTPUT) ) ) ) ) (cell x_zero (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port OUT (direction OUTPUT) ) ) ) ) (cell x_or2 (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port IN0 (direction INPUT) ) (port IN1 (direction INPUT) ) (port OUT (direction OUTPUT) ) ) ) ) (cell x_and3 (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port IN0 (direction INPUT) ) (port IN1 (direction INPUT) ) (port IN2 (direction INPUT) ) (port OUT (direction OUTPUT) ) ) ) ) (cell x_and4 (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port IN0 (direction INPUT) ) (port IN1 (direction INPUT) ) (port IN2 (direction INPUT) ) (port IN3 (direction INPUT) ) (port OUT (direction OUTPUT) ) ) ) ) (cell x_or3 (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port IN0 (direction INPUT) ) (port IN1 (direction INPUT) ) (port IN2 (direction INPUT) ) (port OUT (direction OUTPUT) ) ) ) ) (cell x_xor2 (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port IN0 (direction INPUT) ) (port IN1 (direction INPUT) ) (port OUT (direction OUTPUT) ) ) ) ) (cell x_ipad (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port PAD (direction INPUT) ) ) ) ) (cell x_or4 (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port IN0 (direction INPUT) ) (port IN1 (direction INPUT) ) (port IN2 (direction INPUT) ) (port IN3 (direction INPUT) ) (port OUT (direction OUTPUT) ) ) ) ) (cell x_and2 (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port IN0 (direction INPUT) ) (port IN1 (direction INPUT) ) (port OUT (direction OUTPUT) ) ) ) ) (cell x_inv (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port IN (direction INPUT) ) (port OUT (direction OUTPUT) ) ) ) ) ) (library ex4_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit TIME)))) (cell ex4 (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port (rename A_2__ "A<2>") (direction INPUT) (designator "24") ) (port (rename A_1__ "A<1>") (direction INPUT) (designator "23") ) (port (rename A_3__ "A<3>") (direction INPUT) (designator "25") ) (port (rename A_0__ "A<0>") (direction INPUT) (designator "20") ) (port (rename LED7S_2__ "LED7S<2>") (direction OUTPUT) (designator "68") ) (port (rename LED7S_1__ "LED7S<1>") (direction OUTPUT) (designator "69") ) (port (rename LED7S_0__ "LED7S<0>") (direction OUTPUT) (designator "66") ) (port (rename LED7S_6__ "LED7S<6>") (direction OUTPUT) (designator "76") ) (port (rename LED7S_5__ "LED7S<5>") (direction OUTPUT) (designator "72") ) (port (rename LED7S_4__ "LED7S<4>") (direction OUTPUT) (designator "70") ) (port (rename LED7S_3__ "LED7S<3>") (direction OUTPUT) (designator "71") ) (designator "XC9572-7-PC84") ) (contents (instance LED7S_2__PAD (viewRef view_1 (cellRef x_opad (libraryRef SIMPRIMS))) ) (instance (rename LED7S_2___0 "LED7S_2_&_0") (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS))) (portInstance OUT (property RISE (integer 2500) (unit TIME) (owner "Xilinx")) (property FALL (integer 2500) (unit TIME) (owner "Xilinx")) ) ) (instance C0_N106_1 (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS))) ) (instance C0_N106_REG (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS))) (portInstance OUT (property RISE (integer 500) (unit TIME) (owner "Xilinx")) (property FALL (integer 500) (unit TIME) (owner "Xilinx")) ) ) (instance GND_ZERO (viewRef view_1 (cellRef x_zero (libraryRef SIMPRIMS))) ) (instance C0_N106_D1_2 (viewRef view_1 (cellRef x_or2 (libraryRef SIMPRIMS))) ) (instance C0_N106_D2_PT_0_3 (viewRef view_1 (cellRef x_and3 (libraryRef SIMPRIMS))) (portInstance IN0 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) (portInstance IN1 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) (portInstance IN2 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) ) (instance C0_N106_D2_PT_1_4 (viewRef view_1 (cellRef x_and3 (libraryRef SIMPRIMS))) (portInstance IN0 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) (portInstance IN1 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) (portInstance IN2 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) ) (instance C0_N106_D2_PT_2_5 (viewRef view_1 (cellRef x_and4 (libraryRef SIMPRIMS)))
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