ex3.vm6

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· VM6 代码 · 共 927 行 · 第 1/5 页

NODE | N_b<3> | 630 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<2> | 634 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK | 780 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.Q | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK | 781 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.Q | N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<2> | 629 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<1> | 628 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | EXP4_.EXP | 763 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | EXP4_.EXP | EXP4_ | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | EXP5_.EXP | 764 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | EXP5_.EXP | EXP5_ | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<7>$X0$N_b<7>/N_a<7>$X0$N_b<7>_D.FBK | 782 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<7>$X0$N_b<7>/N_a<7>$X0$N_b<7>_D.Q | N_a<7>$X0$N_b<7>/N_a<7>$X0$N_b<7>_D | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N45.D1 | 707 | ? | 0 | 4096 | sum<7>_BUFR.MC | NULL | NULL | N45.SI | 1 | 9 | MC_SI_D1
SPPTERM | 1 | IV_TRUE | N_a<7>$X0$N_b<7>/N_a<7>$X0$N_b<7>_D.FBK
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N45.D2 | 708 | ? | 0 | 4096 | sum<7>_BUFR.MC | NULL | NULL | N45.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | EXP4_.EXP
SPPTERM | 1 | IV_TRUE | EXP5_.EXP
SPPTERM | 8 | IV_TRUE | N_a<0> | IV_TRUE | N_b<0> | IV_TRUE | N_a<1> | IV_TRUE | N_b<2> | IV_TRUE | N_b<3> | IV_TRUE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK | IV_TRUE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK | IV_TRUE | N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK
SPPTERM | 8 | IV_TRUE | N_a<0> | IV_TRUE | N_b<0> | IV_TRUE | N_a<1> | IV_TRUE | N_b<3> | IV_TRUE | N_a<2> | IV_TRUE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK | IV_TRUE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK | IV_TRUE | N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK
SPPTERM | 8 | IV_TRUE | N_a<0> | IV_TRUE | N_b<0> | IV_TRUE | N_b<1> | IV_TRUE | N_b<2> | IV_TRUE | N_b<3> | IV_TRUE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK | IV_TRUE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK | IV_TRUE | N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK
SPPTERM | 8 | IV_TRUE | N_a<0> | IV_TRUE | N_b<0> | IV_TRUE | N_b<1> | IV_TRUE | N_b<3> | IV_TRUE | N_a<2> | IV_TRUE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK | IV_TRUE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK | IV_TRUE | N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK

SRFF_INSTANCE | N45.REG | sum<7>_BUFR.MC | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N45.D | 706 | ? | 0 | 0 | sum<7>_BUFR.MC | NULL | NULL | N45.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N45.Q | 709 | ? | 0 | 0 | sum<7>_BUFR.MC | NULL | NULL | N45.REG | 0 | 8 | SRFF_Q

OUTPUT_INSTANCE | 0 | sum<0> | EX3_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | C2/C0/N3 | 641 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | C2/C0/N3.Q | C2/C0/N3 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sum<0> | 649 | PO | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | sum<0> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sum<1> | EX3_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N39 | 642 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N39.Q | N39 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sum<1> | 650 | PO | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | sum<1> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sum<2> | EX3_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N40 | 643 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N40.Q | N40 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sum<2> | 651 | PO | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | sum<2> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sum<3> | EX3_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N41 | 644 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N41.Q | N41 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sum<3> | 652 | PO | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | sum<3> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sum<4> | EX3_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N42 | 645 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N42.Q | N42 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sum<4> | 653 | PO | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | sum<4> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sum<5> | EX3_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N43 | 646 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N43.Q | N43 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sum<5> | 654 | PO | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | sum<5> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sum<6> | EX3_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N44 | 741 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | HPART_CREATED_1.Q | _9_ | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sum<6> | 655 | PO | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | sum<6> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sum<7> | EX3_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N45 | 735 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | HPART_CREATED_0.Q | _8_ | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sum<7> | 656 | PO | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | sum<7> | 0 | 6 | OI_OUT

MACROCELL_INSTANCE | SoftPfbk+ClkInv | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D | EX3_COPY_0_COPY_0 | 2248146944 | 2 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<3> | 630 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<3> | 635 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<3> | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.UIM | 657 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.Q | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.FBK | 778 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.Q | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.SI | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D | 0 | 2 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<3> | 630 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<3> | 635 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<3> | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.D1 | 711 | ? | 0 | 4096 | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D | NULL | NULL | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.SI | 1 | 9 | MC_SI_D1
SPPTERM | 1 | IV_TRUE | N_b<3>
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.D2 | 712 | ? | 0 | 4096 | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D | NULL | NULL | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | N_a<3>

SRFF_INSTANCE | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.REG | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.D | 710 | ? | 0 | 0 | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D | NULL | NULL | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.Q | 713 | ? | 0 | 0 | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D | NULL | NULL | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | SoftPfbk+ClkInv | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | EX3_COPY_0_COPY_0 | 2248146944 | 2 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<4> | 631 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<4> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<4> | 636 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<4> | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.UIM | 658 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.Q | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK | 779 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.Q | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.SI | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | 0 | 2 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<4> | 631 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<4> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<4> | 636 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<4> | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.D1 | 715 | ? | 0 | 4096 | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | NULL | NULL | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.SI | 1 | 9 | MC_SI_D1
SPPTERM | 1 | IV_TRUE | N_b<4>
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.D2 | 716 | ? | 0 | 4096 | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | NULL | NULL | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | N_a<4>

SRFF_INSTANCE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.REG | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.D | 714 | ? | 0 | 0 | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | NULL | NULL | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.Q | 717 | ? | 0 | 0 | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | NULL | NULL | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | SoftPfbk+ClkInv | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D | EX3_COPY_0_COPY_0 | 2248146944 | 7 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<5> | 632 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<5> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<5> | 637 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<5> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK | 779 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.Q | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<4> | 636 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<4> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<3> | 630 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<3> | 635 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK | 780 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.Q | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.UIM | 659 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.Q | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
NODE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.EXP | 761 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.EXP | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D | 4 | 0 | MC_EXPORT
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK | 780 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.Q | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.SI | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D | 0 | 7 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<5> | 632 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<5> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<5> | 637 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<5> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK | 779 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.Q | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<4> | 636 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<4> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<3> | 630 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<3> | 635 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK | 780 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.Q | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.D1 | 719 | ? | 0 | 4096 | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D | NULL | NULL | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.SI | 1 | 9 | MC_SI_D1
SPPTERM | 1 | IV_TRUE | N_b<5>
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.D2 | 720 | ? | 0 | 4096 | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D | NULL | NULL | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | N_a<5>
OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
SIGNAL | NODE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.EXP | 749 | ? | 0 | 0 | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D | NULL | NULL | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.SI | 7 | 9 | MC_SI_EXPORT
SPPTERM | 2 | IV_TRUE | N_a<5> | IV_FALSE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK
SPPTERM | 3 | IV_TRUE | N_a<4> | IV_FALSE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK | IV_TRUE | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK