ex3.vm6

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· VM6 代码 · 共 927 行 · 第 1/5 页

VM6
927 行
字号
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INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<1> | 628 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<2> | 629 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<2> | 634 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<0> | 625 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<0> | 626 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | EXP9_.EXP | 774 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | EXP9_.EXP | EXP9_ | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N39.EXP | 775 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N39.EXP | N39 | 4 | 0 | MC_EXPORT
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | N40 | 643 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N40.Q | N40 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N40.UIM | 787 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N40.Q | N40 | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | N40.SI | N40 | 0 | 8 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<1> | 627 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<1> | 628 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<2> | 629 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<2> | 634 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<0> | 625 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<0> | 626 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | EXP9_.EXP | 774 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | EXP9_.EXP | EXP9_ | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N39.EXP | 775 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N39.EXP | N39 | 4 | 0 | MC_EXPORT
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N40.D1 | 687 | ? | 0 | 4096 | N40 | NULL | NULL | N40.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N40.D2 | 688 | ? | 0 | 4096 | N40 | NULL | NULL | N40.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | EXP9_.EXP
SPPTERM | 1 | IV_TRUE | N39.EXP
SPPTERM | 4 | IV_FALSE | N_a<0> | IV_FALSE | N_a<1> | IV_FALSE | N_b<2> | IV_TRUE | N_a<2>
SPPTERM | 4 | IV_FALSE | N_a<0> | IV_FALSE | N_b<1> | IV_FALSE | N_b<2> | IV_TRUE | N_a<2>
SPPTERM | 4 | IV_FALSE | N_b<0> | IV_FALSE | N_a<1> | IV_FALSE | N_b<2> | IV_TRUE | N_a<2>
SPPTERM | 4 | IV_TRUE | N_a<1> | IV_TRUE | N_b<1> | IV_TRUE | N_b<2> | IV_TRUE | N_a<2>
SPPTERM | 4 | IV_FALSE | N_a<1> | IV_FALSE | N_b<1> | IV_FALSE | N_b<2> | IV_TRUE | N_a<2>

SRFF_INSTANCE | N40.REG | N40 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N40.D | 686 | ? | 0 | 0 | N40 | NULL | NULL | N40.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N40.Q | 689 | ? | 0 | 0 | N40 | NULL | NULL | N40.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | OptxMapped | N41 | EX3_COPY_0_COPY_0 | 2155872256 | 10 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK | 779 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.Q | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<2> | 629 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<2> | 634 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<1> | 627 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<1> | 628 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<0> | 625 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<0> | 626 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<3> | 635 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | EXP0_.EXP | 754 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | EXP0_.EXP | EXP0_ | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.FBK | 778 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.Q | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | N41 | 644 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N41.Q | N41 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N41.UIM | 788 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N41.Q | N41 | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
NODE | N41.EXP | 755 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N41.EXP | N41 | 4 | 0 | MC_EXPORT

SIGNAL_INSTANCE | N41.SI | N41 | 0 | 10 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK | 779 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.Q | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<2> | 629 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<2> | 634 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<1> | 627 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<1> | 628 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<0> | 625 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<0> | 626 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<3> | 635 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | EXP0_.EXP | 754 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | EXP0_.EXP | EXP0_ | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.FBK | 778 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.Q | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N41.D1 | 691 | ? | 0 | 4096 | N41 | NULL | NULL | N41.SI | 1 | 9 | MC_SI_D1
SPPTERM | 1 | IV_TRUE | N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D.FBK
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N41.D2 | 692 | ? | 0 | 4096 | N41 | NULL | NULL | N41.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | EXP0_.EXP
SPPTERM | 2 | IV_TRUE | N_b<2> | IV_TRUE | N_a<2>
SPPTERM | 3 | IV_TRUE | N_a<1> | IV_TRUE | N_b<1> | IV_TRUE | N_a<2>
OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
SIGNAL | NODE | N41.EXP | 743 | ? | 0 | 0 | N41 | NULL | NULL | N41.SI | 7 | 9 | MC_SI_EXPORT
SPPTERM | 6 | IV_TRUE | N_a<0> | IV_TRUE | N_b<0> | IV_TRUE | N_a<1> | IV_TRUE | N_a<2> | IV_TRUE | N_a<3> | IV_TRUE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK
SPPTERM | 6 | IV_TRUE | N_a<0> | IV_TRUE | N_b<0> | IV_TRUE | N_b<1> | IV_TRUE | N_a<2> | IV_TRUE | N_a<3> | IV_TRUE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK

SRFF_INSTANCE | N41.REG | N41 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N41.D | 690 | ? | 0 | 0 | N41 | NULL | NULL | N41.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N41.Q | 693 | ? | 0 | 0 | N41 | NULL | NULL | N41.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | OptxMapped | N42 | EX3_COPY_0_COPY_0 | 2155872256 | 10 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.UIM | 658 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.Q | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<2> | 629 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<2> | 634 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<3> | 635 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<1> | 627 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<1> | 628 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<0> | 625 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<0> | 626 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | EXP10_.EXP | 776 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | EXP10_.EXP | EXP10_ | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | EXP11_.EXP | 777 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | EXP11_.EXP | EXP11_ | 4 | 0 | MC_EXPORT
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | N42 | 645 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N42.Q | N42 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N42.UIM | 789 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N42.Q | N42 | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | N42.SI | N42 | 0 | 10 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.UIM | 658 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.Q | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<2> | 629 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<2> | 634 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<3> | 635 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<1> | 627 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<1> | 628 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<0> | 625 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<0> | 626 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | EXP10_.EXP | 776 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | EXP10_.EXP | EXP10_ | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | EXP11_.EXP | 777 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | EXP11_.EXP | EXP11_ | 4 | 0 | MC_EXPORT
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N42.D1 | 695 | ? | 0 | 4096 | N42 | NULL | NULL | N42.SI | 1 | 9 | MC_SI_D1
SPPTERM | 1 | IV_TRUE | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.UIM
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N42.D2 | 696 | ? | 0 | 4096 | N42 | NULL | NULL | N42.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | EXP10_.EXP
SPPTERM | 1 | IV_TRUE | EXP11_.EXP
SPPTERM | 3 | IV_TRUE | N_b<2> | IV_TRUE | N_a<2> | IV_TRUE | N_a<3>
SPPTERM | 4 | IV_TRUE | N_a<1> | IV_TRUE | N_b<1> | IV_TRUE | N_b<2> | IV_TRUE | N_a<3>
SPPTERM | 4 | IV_TRUE | N_a<1> | IV_TRUE | N_b<1> | IV_TRUE | N_a<2> | IV_TRUE | N_a<3>
SPPTERM | 5 | IV_TRUE | N_a<0> | IV_TRUE | N_b<0> | IV_TRUE | N_a<1> | IV_TRUE | N_a<2> | IV_TRUE | N_a<3>

SRFF_INSTANCE | N42.REG | N42 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N42.D | 694 | ? | 0 | 0 | N42 | NULL | NULL | N42.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
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ex3.vm6 - 源码说明

本页面展示了「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][」中的 ex3.vm6 源码文件，采用 VM6 编程语言编写，共 927 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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