ex3.vm6

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· VM6 代码 · 共 927 行 · 第 1/5 页

VM6
927 行
字号
12345
NDS Database:  version E.38

NDS_INFO | xc9500 | 9510884 | XC95108-7-PC84

DEVICE | 95108 | 9510884 | 

NETWORK | ex3 | 0 | 0 | 209731591

INPUT_INSTANCE | 0 | 0 | NULL | N_a<0> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | a<0> | 662 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_a<0> | 625 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<0> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_b<0> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | b<0> | 663 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_b<0> | 626 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<0> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_a<1> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | a<1> | 664 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_a<1> | 627 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<1> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_b<1> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | b<1> | 665 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_b<1> | 628 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<1> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_b<2> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | b<2> | 666 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_b<2> | 629 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<2> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_b<3> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | b<3> | 667 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_b<3> | 630 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<3> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_b<4> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | b<4> | 668 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_b<4> | 631 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<4> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_b<5> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | b<5> | 669 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_b<5> | 632 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<5> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_b<6> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | b<6> | 670 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_b<6> | 633 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<6> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_a<2> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | a<2> | 671 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_a<2> | 634 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<2> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_a<3> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | a<3> | 672 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_a<3> | 635 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<3> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_a<4> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | a<4> | 673 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_a<4> | 636 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<4> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_a<5> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | a<5> | 674 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_a<5> | 637 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<5> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_a<6> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | a<6> | 675 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_a<6> | 638 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<6> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_a<7> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | a<7> | 676 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_a<7> | 639 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<7> | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_b<7> | EX3_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | b<7> | 677 | PI | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_b<7> | 640 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<7> | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | OptxMapped | C2/C0/N3 | EX3_COPY_0_COPY_0 | 2155872256 | 2 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<0> | 626 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<0> | 625 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<0> | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | C2/C0/N3 | 641 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | C2/C0/N3.Q | C2/C0/N3 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | C2/C0/N3.UIM | 785 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | C2/C0/N3.Q | C2/C0/N3 | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | C2/C0/N3.SI | C2/C0/N3 | 0 | 2 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<0> | 626 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<0> | 625 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<0> | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | C2/C0/N3.D1 | 679 | ? | 0 | 4096 | C2/C0/N3 | NULL | NULL | C2/C0/N3.SI | 1 | 9 | MC_SI_D1
SPPTERM | 1 | IV_TRUE | N_b<0>
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | C2/C0/N3.D2 | 680 | ? | 0 | 4096 | C2/C0/N3 | NULL | NULL | C2/C0/N3.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | N_a<0>

SRFF_INSTANCE | C2/C0/N3.REG | C2/C0/N3 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | C2/C0/N3.D | 678 | ? | 0 | 0 | C2/C0/N3 | NULL | NULL | C2/C0/N3.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | C2/C0/N3.Q | 681 | ? | 0 | 0 | C2/C0/N3 | NULL | NULL | C2/C0/N3.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | OptxMapped | N39 | EX3_COPY_0_COPY_0 | 2155872256 | 6 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<0> | 625 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<0> | 626 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<1> | 627 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<1> | 628 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<2> | 629 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<2> | 634 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<2> | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | N39 | 642 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N39.Q | N39 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N39.UIM | 786 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N39.Q | N39 | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
NODE | N39.EXP | 775 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | N39.EXP | N39 | 4 | 0 | MC_EXPORT

SIGNAL_INSTANCE | N39.SI | N39 | 0 | 6 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<0> | 625 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<0> | 626 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<1> | 627 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<1> | 628 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_b<2> | 629 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_b<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<2> | 634 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<2> | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N39.D1 | 683 | ? | 0 | 4096 | N39 | NULL | NULL | N39.SI | 1 | 9 | MC_SI_D1
SPPTERM | 2 | IV_TRUE | N_a<0> | IV_TRUE | N_b<0>
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N39.D2 | 684 | ? | 0 | 4096 | N39 | NULL | NULL | N39.SI | 2 | 9 | MC_SI_D2
SPPTERM | 2 | IV_TRUE | N_a<1> | IV_FALSE | N_b<1>
SPPTERM | 2 | IV_FALSE | N_a<1> | IV_TRUE | N_b<1>
OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
SIGNAL | NODE | N39.EXP | 769 | ? | 0 | 0 | N39 | NULL | NULL | N39.SI | 7 | 9 | MC_SI_EXPORT
SPPTERM | 4 | IV_FALSE | N_b<0> | IV_FALSE | N_b<1> | IV_TRUE | N_b<2> | IV_FALSE | N_a<2>
SPPTERM | 4 | IV_TRUE | N_a<1> | IV_TRUE | N_b<1> | IV_FALSE | N_b<2> | IV_FALSE | N_a<2>

SRFF_INSTANCE | N39.REG | N39 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N39.D | 682 | ? | 0 | 0 | N39 | NULL | NULL | N39.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N39.Q | 685 | ? | 0 | 0 | N39 | NULL | NULL | N39.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | OptxMapped | N40 | EX3_COPY_0_COPY_0 | 2155872256 | 8 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_a<1> | 627 | ? | 0 | 0 | EX3_COPY_0_COPY_0 | NULL | NULL | N_a<1> | 0 | 5 | II_IMUX
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ex3.vm6 - 源码说明

本页面展示了「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][」中的 ex3.vm6 源码文件，采用 VM6 编程语言编写，共 927 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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