time_sim.edn
来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· EDN 代码 · 共 1,664 行 · 第 1/5 页
EDN
1,664 行
(port OUT (direction OUTPUT) ) ) ) ) (cell x_and7 (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port IN0 (direction INPUT) ) (port IN1 (direction INPUT) ) (port IN2 (direction INPUT) ) (port IN3 (direction INPUT) ) (port IN4 (direction INPUT) ) (port IN5 (direction INPUT) ) (port IN6 (direction INPUT) ) (port OUT (direction OUTPUT) ) ) ) ) (cell x_and8 (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port IN0 (direction INPUT) ) (port IN1 (direction INPUT) ) (port IN2 (direction INPUT) ) (port IN3 (direction INPUT) ) (port IN4 (direction INPUT) ) (port IN5 (direction INPUT) ) (port IN6 (direction INPUT) ) (port IN7 (direction INPUT) ) (port OUT (direction OUTPUT) ) ) ) ) (cell x_inv (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port IN (direction INPUT) ) (port OUT (direction OUTPUT) ) ) ) ) ) (library ex3_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit TIME)))) (cell ex3 (cellType GENERIC) (view view_1 (viewType NETLIST) (interface (port (rename a_0__ "a<0>") (direction INPUT) (designator "20") ) (port (rename b_0__ "b<0>") (direction INPUT) (designator "36") ) (port (rename a_1__ "a<1>") (direction INPUT) (designator "23") ) (port (rename b_1__ "b<1>") (direction INPUT) (designator "33") ) (port (rename b_2__ "b<2>") (direction INPUT) (designator "35") ) (port (rename b_3__ "b<3>") (direction INPUT) (designator "37") ) (port (rename b_4__ "b<4>") (direction INPUT) (designator "40") ) (port (rename b_5__ "b<5>") (direction INPUT) (designator "39") ) (port (rename b_6__ "b<6>") (direction INPUT) (designator "41") ) (port (rename a_2__ "a<2>") (direction INPUT) (designator "24") ) (port (rename a_3__ "a<3>") (direction INPUT) (designator "25") ) (port (rename a_4__ "a<4>") (direction INPUT) (designator "26") ) (port (rename a_5__ "a<5>") (direction INPUT) (designator "31") ) (port (rename a_6__ "a<6>") (direction INPUT) (designator "34") ) (port (rename a_7__ "a<7>") (direction INPUT) (designator "32") ) (port (rename b_7__ "b<7>") (direction INPUT) (designator "43") ) (port (rename sum_7__ "sum<7>") (direction OUTPUT) (designator "77") ) (port (rename sum_0__ "sum<0>") (direction OUTPUT) (designator "66") ) (port (rename sum_1__ "sum<1>") (direction OUTPUT) (designator "69") ) (port (rename sum_2__ "sum<2>") (direction OUTPUT) (designator "68") ) (port (rename sum_3__ "sum<3>") (direction OUTPUT) (designator "71") ) (port (rename sum_4__ "sum<4>") (direction OUTPUT) (designator "70") ) (port (rename sum_5__ "sum<5>") (direction OUTPUT) (designator "72") ) (port (rename sum_6__ "sum<6>") (direction OUTPUT) (designator "76") ) (designator "XC95108-7-PC84") ) (contents (instance sum_0__PAD (viewRef view_1 (cellRef x_opad (libraryRef SIMPRIMS))) ) (instance (rename sum_0___0 "sum_0_&_0") (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS))) (portInstance OUT (property RISE (integer 2500) (unit TIME) (owner "Xilinx")) (property FALL (integer 2500) (unit TIME) (owner "Xilinx")) ) ) (instance C2_C0_N3_1 (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS))) ) (instance C2_C0_N3_REG (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS))) (portInstance OUT (property RISE (integer 500) (unit TIME) (owner "Xilinx")) (property FALL (integer 500) (unit TIME) (owner "Xilinx")) ) ) (instance C2_C0_N3_D1_PT_0_2 (viewRef view_1 (cellRef x_and2 (libraryRef SIMPRIMS))) (portInstance IN0 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) (portInstance IN1 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) ) (instance C2_C0_N3_D1_3 (viewRef view_1 (cellRef x_or2 (libraryRef SIMPRIMS))) ) (instance C2_C0_N3_D2_PT_0_4 (viewRef view_1 (cellRef x_and2 (libraryRef SIMPRIMS))) (portInstance IN0 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) (portInstance IN1 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) ) (instance C2_C0_N3_D2_5 (viewRef view_1 (cellRef x_or2 (libraryRef SIMPRIMS))) ) (instance C2_C0_N3_XOR (viewRef view_1 (cellRef x_xor2 (libraryRef SIMPRIMS))) ) (instance b_0__PAD (viewRef view_1 (cellRef x_ipad (libraryRef SIMPRIMS))) ) (instance (rename N_b_0___6 "N_b_0_&_6") (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS))) (portInstance OUT (property RISE (integer 2500) (unit TIME) (owner "Xilinx")) (property FALL (integer 2500) (unit TIME) (owner "Xilinx")) ) ) (instance a_0__PAD (viewRef view_1 (cellRef x_ipad (libraryRef SIMPRIMS))) ) (instance (rename N_a_0___7 "N_a_0_&_7") (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS))) (portInstance OUT (property RISE (integer 2500) (unit TIME) (owner "Xilinx")) (property FALL (integer 2500) (unit TIME) (owner "Xilinx")) ) ) (instance sum_1__PAD (viewRef view_1 (cellRef x_opad (libraryRef SIMPRIMS))) ) (instance (rename sum_1___8 "sum_1_&_8") (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS))) (portInstance OUT (property RISE (integer 2500) (unit TIME) (owner "Xilinx")) (property FALL (integer 2500) (unit TIME) (owner "Xilinx")) ) ) (instance N39_9 (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS))) ) (instance N39_REG (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS))) (portInstance OUT (property RISE (integer 500) (unit TIME) (owner "Xilinx")) (property FALL (integer 500) (unit TIME) (owner "Xilinx")) ) ) (instance N39_D1_PT_0_10 (viewRef view_1 (cellRef x_and2 (libraryRef SIMPRIMS))) (portInstance IN0 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) (portInstance IN1 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) ) (instance N39_D1_11 (viewRef view_1 (cellRef x_or2 (libraryRef SIMPRIMS))) ) (instance N39_D2_PT_0_12 (viewRef view_1 (cellRef x_and2 (libraryRef SIMPRIMS))) (portInstance IN0 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) (portInstance IN1 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) ) (instance N39_D2_PT_1_13 (viewRef view_1 (cellRef x_and2 (libraryRef SIMPRIMS))) (portInstance IN0 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) (portInstance IN1 (property RISE (integer 2000) (unit TIME) (owner "Xilinx")) (property FALL (integer 2000) (unit TIME) (owner "Xilinx")) ) ) (instance N39_D2_14 (viewRef view_1 (cellRef x_or2 (libraryRef SIMPRIMS))) ) (instance N39_XOR (viewRef view_1 (cellRef x_xor2 (libraryRef SIMPRIMS))) ) (instance N39_EXP_PT_0_15 (viewRef view_1 (cellRef x_and4 (libraryRef SIMPRIMS))) (portInstance IN0
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