ex3.rpt

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· RPT 代码 · 共 681 行 · 第 1/3 页

RPT
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	+ "a<0>" * "b<0>" * "b<1>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
;Imported pterms FB2_2
	+ "a<0>" * "b<0>" * "a<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
;Imported pterms FB2_4
	+ "a<1>" * "b<1>" * "b<2>" * "b<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "a<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
;Imported pterms FB2_5
	+ "a<4>" * 
	/"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "b<3>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "b<2>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "b<2>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK    

 "N_a<3>$X0$N_b<3>/N_a<3>$X0$N_b<3>_D"  =  "b<3>"
	Xor "a<3>"    

 "N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D"  =  "b<4>"
	Xor "a<4>"    

 "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D"  =  "b<5>"
	Xor "a<5>"    

 "N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D"  =  "b<6>"
	Xor "a<6>"    

 "N_a<7>$X0$N_b<7>/N_a<7>$X0$N_b<7>_D"  =  "b<7>"
	Xor "a<7>"    

 "sum<7>"  =  ;Imported pterms FB2_8
	  "sum<7>_BUFR.FBK".LFBK    

 "sum<6>"  =  "sum<6>_BUFR.FBK".LFBK    

 "sum<6>_BUFR"  =  "N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	Xor "a<0>" * "b<0>" * "a<1>" * "b<2>" * "b<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "a<1>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>" * "b<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
;Imported pterms FB2_9
	+ "a<1>" * "b<1>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "a<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "a<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
;Imported pterms FB2_11
	+ "b<2>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "b<2>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<2>" * "b<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
;Imported pterms FB2_12
	+ "a<5>" * 
	/"N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<4>" * 
	/"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "b<3>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK    

 "sum<7>_BUFR"  =  "N_a<7>$X0$N_b<7>/N_a<7>$X0$N_b<7>_D.FBK".LFBK
	Xor "a<0>" * "b<0>" * "a<1>" * "b<2>" * "b<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "a<1>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>" * "b<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
;Imported pterms FB2_15
	+ "a<1>" * "b<1>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "a<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "a<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
;Imported pterms FB2_14
	+ "a<6>" * 
	/"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<5>" * 
	/"N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * "N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<4>" * 
	/"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
;Imported pterms FB2_17
	+ "b<2>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "b<2>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<2>" * "b<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
;Imported pterms FB2_18
	+ "b<3>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK    

****************************  Device Pin Out ****************************

Device : XC95108-7-PC84


                                                             s  s     
                                                             u  u     
                                                             m  m     
       T  T  T  G  T  T  T  T  T  T  T  T  T  T  T  T  T  V  <  <  T  
       I  I  I  N  I  I  I  I  I  I  I  I  I  I  I  I  I  C  7  6  I  
       E  E  E  D  E  E  E  E  E  E  E  E  E  E  E  E  E  C  >  >  E  
       --------------------------------------------------------------  
      /11 10 9  8  7  6  5  4  3  2  1  84 83 82 81 80 79 78 77 76 75 \
 TIE | 12                                                          74 | TIE
 TIE | 13                                                          73 | VCC
 TIE | 14                                                          72 | sum<5>
 TIE | 15                                                          71 | sum<3>
 GND | 16                                                          70 | sum<4>
 TIE | 17                                                          69 | sum<1>
 TIE | 18                                                          68 | sum<2>
 TIE | 19                                                          67 | TIE
a<0> | 20                                                          66 | sum<0>
 TIE | 21                       XC95108-7-PC84                     65 | TIE
 VCC | 22                                                          64 | VCC
a<1> | 23                                                          63 | TIE
a<2> | 24                                                          62 | TIE
a<3> | 25                                                          61 | TIE
a<4> | 26                                                          60 | GND
 GND | 27                                                          59 | TDO
 TDI | 28                                                          58 | TIE
 TMS | 29                                                          57 | TIE
 TCK | 30                                                          56 | TIE
a<5> | 31                                                          55 | TIE
a<7> | 32                                                          54 | TIE
     \ 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 /
       --------------------------------------------------------------  
       b  a  b  b  b  V  b  b  b  G  b  T  T  T  T  T  G  T  T  T  T  
       <  <  <  <  <  C  <  <  <  N  <  I  I  I  I  I  N  I  I  I  I  
       1  6  2  0  3  C  5  4  6  D  7  E  E  E  E  E  D  E  E  E  E  
       >  >  >  >  >     >  >  >     >                                


Legend :  NC  = Not Connected, unbonded pin
         TIE  = Tie pin to GND or board trace driven to valid logic level
         VCC  = Dedicated Power Pin
         GND  = Dedicated Ground Pin
         TDI  = Test Data In, JTAG pin
         TDO  = Test Data Out, JTAG pin
         TCK  = Test Clock, JTAG pin
         TMS  = Test Mode Select, JTAG pin
         PE   = Port Enable pin
  PROHIBITED  = User reserved pin
****************************  Compiler Options  ****************************

Following is a list of all global compiler options used by the fitter run.

Device(s) Specified                         : XC95108-7-PC84
Use Timing Constraints                      : ON
Use Design Location Constraints             : ON
Create Programmable Ground Pins             : OFF
Use Advanced Fitting                        : ON
Use Local Feedback                          : ON
Use Pin Feedback                            : ON
Default Power Setting                       : STD
Default Output Slew Rate                    : FAST
Guide File Used                             : NONE
Multi Level Logic Optimization              : ON
Timing Optimization                         : ON
Power/Slew Optimization                     : OFF
High Fitting Effort                         : ON
Automatic Wire-ANDing                       : ON
Xor Synthesis                               : ON
D/T Synthesis                               : ON
Use Boolean Minimization                    : ON
Global Clock(GCK) Optimization              : ON
Global Set/Reset(GSR) Optimization          : ON
Global Output Enable(GTS) Optimization      : ON
Collapsing pterm limit                      : 25
Collapsing input limit                      : 36
123

ex3.rpt - 源码说明

本页面展示了「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][」中的 ex3.rpt 源码文件，采用 RPT 编程语言编写，共 681 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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