ex3.mfd

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· MFD 代码 · 共 611 行 · 第 1/2 页
MFD
611 行
INPUTP | 5 | 86 | 67 | 72 | 65 | 56
EXPORTS | 1 | 1 | 14
EQ | 9 | 
    "N_a<7>$X0$N_b<7>/N_a<7>$X0$N_b<7>_D"  =  "b<7>"
	Xor "a<7>"
    N_a<7>$X0$N_b<7>/N_a<7>$X0$N_b<7>_D.EXP  =  "a<6>" * 
	/"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<5>" * 
	/"N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * "N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<4>" * 
	/"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK

MACROCELL | 1 | 8 | _8_
ATTRIBUTES | 396034 | 0
OUTPUTMC | 1 | 1 | 9
INPUTS | 11 | a<1>  | b<1>  | b<3>  | a<2>  | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK  | a<0>  | b<0>  | b<2>  | a<3>  | _9_.EXP  | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
INPUTMC | 3 | 1 | 11 | 1 | 7 | 1 | 6
INPUTP | 8 | 53 | 70 | 78 | 54 | 50 | 76 | 74 | 55
EXPORTS | 1 | 1 | 9
IMPORTS | 1 | 1 | 7
EQ | 12 | 
    "sum<7>"  =  ;Imported pterms FB2_8
	  "sum<7>_BUFR.FBK".LFBK
    _8_.EXP  =  "a<1>" * "b<1>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "a<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "a<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK

MACROCELL | 1 | 7 | _9_
ATTRIBUTES | 396034 | 0
OUTPUTMC | 1 | 1 | 8
INPUTS | 2 | sum<7>_BUFR.FBK".LFBK  | sum<6>_BUFR.FBK".LFBK
INPUTMC | 2 | 1 | 15 | 1 | 9
EXPORTS | 1 | 1 | 8
EQ | 2 | 
    "sum<6>"  =  "sum<6>_BUFR.FBK".LFBK
    _9_.EXP  =  "sum<7>_BUFR.FBK".LFBK

MACROCELL | 1 | 0 | EXP0_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 1
INPUTS | 6 | a<1>  | b<1>  | b<2>  | a<0>  | b<0>  | a<2>
INPUTP | 6 | 53 | 70 | 74 | 50 | 76 | 54
EXPORTS | 1 | 1 | 1
EQ | 5 | 
       EXP0_.EXP  =  "a<1>" * "b<1>" * "b<2>"
	+ "a<0>" * "b<0>" * "a<1>" * "b<2>"
	+ "a<0>" * "b<0>" * "a<1>" * "a<2>"
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>"
	+ "a<0>" * "b<0>" * "b<1>" * "a<2>"

MACROCELL | 1 | 3 | EXP1_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 2
INPUTS | 10 | a<1>  | b<1>  | b<2>  | b<3>  | a<2>  | a<3>  | a<0>  | b<0>  | EXP2_.EXP  | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
INPUTMC | 2 | 1 | 4 | 1 | 6
INPUTP | 8 | 53 | 70 | 74 | 78 | 54 | 55 | 50 | 76
EXPORTS | 1 | 1 | 2
IMPORTS | 1 | 1 | 4
EQ | 21 | 
       EXP1_.EXP  =  "a<1>" * "b<1>" * "b<2>" * "b<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "a<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
;Imported pterms FB2_5
	+ "a<4>" * 
	/"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "b<3>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "b<2>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "b<2>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK

MACROCELL | 1 | 4 | EXP2_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 3
INPUTS | 8 | a<4>  | b<3>  | a<3>  | b<2>  | a<2>  | a<1>  | b<1>  | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
INPUTMC | 1 | 1 | 6
INPUTP | 7 | 56 | 78 | 55 | 74 | 54 | 53 | 70
EXPORTS | 1 | 1 | 3
EQ | 10 | 
       EXP2_.EXP  =  "a<4>" * 
	/"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "b<3>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "b<2>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "b<2>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK

MACROCELL | 1 | 10 | EXP3_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 9
INPUTS | 9 | b<2>  | b<3>  | a<2>  | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK  | a<3>  | a<1>  | b<1>  | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.EXP  | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
INPUTMC | 3 | 1 | 11 | 1 | 11 | 1 | 6
INPUTP | 6 | 74 | 78 | 54 | 55 | 53 | 70
EXPORTS | 1 | 1 | 9
IMPORTS | 1 | 1 | 11
EQ | 17 | 
       EXP3_.EXP  =  "b<2>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "b<2>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<2>" * "b<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
;Imported pterms FB2_12
	+ "a<5>" * 
	/"N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "a<4>" * 
	/"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK
	+ "b<3>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK

MACROCELL | 1 | 14 | EXP4_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 15
INPUTS | 12 | a<1>  | b<1>  | b<3>  | a<2>  | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK  | N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK  | a<0>  | b<0>  | b<2>  | a<3>  | N_a<7>$X0$N_b<7>/N_a<7>$X0$N_b<7>_D.EXP  | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
INPUTMC | 4 | 1 | 11 | 1 | 12 | 1 | 13 | 1 | 6
INPUTP | 8 | 53 | 70 | 78 | 54 | 50 | 76 | 74 | 55
EXPORTS | 1 | 1 | 15
IMPORTS | 1 | 1 | 13
EQ | 23 | 
       EXP4_.EXP  =  "a<1>" * "b<1>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "a<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "a<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<0>" * "b<0>" * "b<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
;Imported pterms FB2_14
	+ "a<6>" * 
	/"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<5>" * 
	/"N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * "N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<4>" * 
	/"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK

MACROCELL | 1 | 16 | EXP5_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 15
INPUTS | 10 | b<2>  | b<3>  | a<2>  | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK  | N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK  | a<3>  | a<1>  | b<1>  | EXP6_.EXP  | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
INPUTMC | 4 | 1 | 11 | 1 | 12 | 1 | 17 | 1 | 6
INPUTP | 6 | 74 | 78 | 54 | 55 | 53 | 70
EXPORTS | 1 | 1 | 15
IMPORTS | 1 | 1 | 17
EQ | 19 | 
       EXP5_.EXP  =  "b<2>" * "b<3>" * "a<2>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "b<2>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<2>" * "b<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "b<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
	+ "a<1>" * "b<1>" * "a<2>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK
;Imported pterms FB2_18
	+ "b<3>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK

MACROCELL | 1 | 17 | EXP6_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 16
INPUTS | 5 | b<3>  | a<3>  | N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK  | N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK  | N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK
INPUTMC | 3 | 1 | 11 | 1 | 12 | 1 | 6
INPUTP | 2 | 78 | 55
EXPORTS | 1 | 1 | 16
EQ | 3 | 
       EXP6_.EXP  =  "b<3>" * "a<3>" * 
	"N_a<4>$X0$N_b<4>/N_a<4>$X0$N_b<4>_D.FBK".LFBK * "N_a<5>$X0$N_b<5>/N_a<5>$X0$N_b<5>_D.FBK".LFBK * 
	"N_a<6>$X0$N_b<6>/N_a<6>$X0$N_b<6>_D.FBK".LFBK

MACROCELL | 3 | 0 | EXP7_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 17
INPUTS | 2 | b<3>  | a<3>
INPUTP | 2 | 78 | 55
EXPORTS | 1 | 3 | 17
EQ | 1 | 
       EXP7_.EXP  =  "b<3>" * "a<3>"

MACROCELL | 3 | 11 | EXP8_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 12
INPUTS | 6 | a<0>  | b<0>  | a<1>  | b<2>  | a<2>  | b<1>
INPUTP | 6 | 50 | 76 | 53 | 74 | 54 | 70
EXPORTS | 1 | 3 | 12
EQ | 4 | 
       EXP8_.EXP  =  "a<0>" * "b<0>" * "a<1>" * "b<2>" * "a<2>"
	+ "a<0>" * "b<0>" * "a<1>" * /"b<2>" * /"a<2>"
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>" * "a<2>"
	+ "a<0>" * "b<0>" * "b<1>" * /"b<2>" * /"a<2>"

MACROCELL | 3 | 12 | EXP9_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 13
INPUTS | 7 | a<0>  | a<1>  | b<2>  | a<2>  | b<1>  | b<0>  | EXP8_.EXP
INPUTMC | 1 | 3 | 11
INPUTP | 6 | 50 | 53 | 74 | 54 | 70 | 76
EXPORTS | 1 | 3 | 13
IMPORTS | 1 | 3 | 11
EQ | 10 | 
       EXP9_.EXP  =  /"a<0>" * /"a<1>" * "b<2>" * /"a<2>"
	+ /"a<0>" * /"b<1>" * "b<2>" * /"a<2>"
	+ /"b<0>" * /"a<1>" * "b<2>" * /"a<2>"
	+ /"b<0>" * /"b<1>" * /"b<2>" * "a<2>"
	+ /"a<1>" * /"b<1>" * "b<2>" * /"a<2>"
;Imported pterms FB4_12
	+ "a<0>" * "b<0>" * "a<1>" * "b<2>" * "a<2>"
	+ "a<0>" * "b<0>" * "a<1>" * /"b<2>" * /"a<2>"
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>" * "a<2>"
	+ "a<0>" * "b<0>" * "b<1>" * /"b<2>" * /"a<2>"

MACROCELL | 3 | 15 | EXP10_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 16
INPUTS | 8 | b<2>  | b<3>  | a<2>  | a<1>  | b<1>  | a<0>  | b<0>  | a<3>
INPUTP | 8 | 74 | 78 | 54 | 53 | 70 | 50 | 76 | 55
EXPORTS | 1 | 3 | 16
EQ | 5 | 
       EXP10_.EXP  =  "b<2>" * "b<3>" * "a<2>"
	+ "a<1>" * "b<1>" * "b<3>" * "a<2>"
	+ "a<0>" * "b<0>" * "a<1>" * "b<2>" * "a<3>"
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>" * "a<3>"
	+ "a<0>" * "b<0>" * "b<1>" * "a<2>" * "a<3>"

MACROCELL | 3 | 17 | EXP11_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 16
INPUTS | 8 | a<1>  | b<1>  | b<2>  | b<3>  | a<0>  | b<0>  | a<2>  | EXP7_.EXP
INPUTMC | 1 | 3 | 0
INPUTP | 7 | 53 | 70 | 74 | 78 | 50 | 76 | 54
EXPORTS | 1 | 3 | 16
IMPORTS | 1 | 3 | 0
EQ | 7 | 
       EXP11_.EXP  =  "a<1>" * "b<1>" * "b<2>" * "b<3>"
	+ "a<0>" * "b<0>" * "a<1>" * "b<2>" * "b<3>"
	+ "a<0>" * "b<0>" * "a<1>" * "b<3>" * "a<2>"
	+ "a<0>" * "b<0>" * "b<1>" * "b<2>" * "b<3>"
	+ "a<0>" * "b<0>" * "b<1>" * "b<3>" * "a<2>"
;Imported pterms FB4_1
	+ "b<3>" * "a<3>"

PIN | a<0> | 64 | 0 | N/A | 50 | 16 | 3 | 10 | 3 | 14 | 3 | 13 | 1 | 0 | 3 | 16 | 1 | 2 | 1 | 9 | 1 | 15 | 1 | 1 | 1 | 3 | 1 | 8 | 1 | 14 | 3 | 11 | 3 | 12 | 3 | 15 | 3 | 17
PIN | b<0> | 64 | 0 | N/A | 76 | 16 | 3 | 10 | 3 | 14 | 3 | 13 | 1 | 0 | 3 | 16 | 1 | 2 | 1 | 9 | 1 | 15 | 1 | 1 | 1 | 3 | 1 | 8 | 1 | 14 | 3 | 11 | 3 | 12 | 3 | 15 | 3 | 17
PIN | a<1> | 64 | 0 | N/A | 53 | 18 | 3 | 14 | 3 | 13 | 1 | 1 | 3 | 16 | 1 | 2 | 1 | 9 | 1 | 15 | 1 | 0 | 1 | 3 | 1 | 4 | 1 | 8 | 1 | 10 | 1 | 14 | 1 | 16 | 3 | 11 | 3 | 12 | 3 | 15 | 3 | 17
PIN | b<1> | 64 | 0 | N/A | 70 | 18 | 3 | 14 | 3 | 13 | 1 | 1 | 3 | 16 | 1 | 2 | 1 | 9 | 1 | 15 | 1 | 0 | 1 | 3 | 1 | 4 | 1 | 8 | 1 | 10 | 1 | 14 | 1 | 16 | 3 | 11 | 3 | 12 | 3 | 15 | 3 | 17
PIN | b<2> | 64 | 0 | N/A | 74 | 18 | 3 | 13 | 1 | 1 | 3 | 16 | 1 | 2 | 1 | 9 | 1 | 15 | 1 | 0 | 1 | 3 | 1 | 4 | 1 | 8 | 1 | 10 | 1 | 14 | 1 | 16 | 3 | 11 | 3 | 12 | 3 | 14 | 3 | 15 | 3 | 17
PIN | b<3> | 64 | 0 | N/A | 78 | 15 | 3 | 15 | 1 | 2 | 1 | 9 | 1 | 15 | 1 | 5 | 1 | 3 | 1 | 4 | 1 | 8 | 1 | 10 | 1 | 11 | 1 | 14 | 1 | 16 | 1 | 17 | 3 | 0 | 3 | 17
PIN | b<4> | 64 | 0 | N/A | 82 | 1 | 1 | 6
PIN | b<5> | 64 | 0 | N/A | 80 | 1 | 1 | 11
PIN | b<6> | 64 | 0 | N/A | 83 | 1 | 1 | 12
PIN | a<2> | 64 | 0 | N/A | 54 | 18 | 3 | 13 | 1 | 1 | 3 | 16 | 1 | 2 | 1 | 9 | 1 | 15 | 1 | 0 | 1 | 3 | 1 | 4 | 1 | 8 | 1 | 10 | 1 | 14 | 1 | 16 | 3 | 11 | 3 | 12 | 3 | 14 | 3 | 15 | 3 | 17
PIN | a<3> | 64 | 0 | N/A | 55 | 13 | 3 | 16 | 1 | 1 | 1 | 8 | 1 | 14 | 1 | 5 | 1 | 3 | 1 | 4 | 1 | 10 | 1 | 11 | 1 | 16 | 1 | 17 | 3 | 0 | 3 | 15
PIN | a<4> | 64 | 0 | N/A | 56 | 4 | 1 | 6 | 1 | 4 | 1 | 13 | 1 | 11
PIN | a<5> | 64 | 0 | N/A | 65 | 2 | 1 | 11 | 1 | 13
PIN | a<6> | 64 | 0 | N/A | 72 | 2 | 1 | 13 | 1 | 12
PIN | a<7> | 64 | 0 | N/A | 67 | 1 | 1 | 13
PIN | b<7> | 64 | 0 | N/A | 86 | 1 | 1 | 13
PIN | sum<0> | 536871040 | 0 | N/A | 121
PIN | sum<1> | 536871040 | 0 | N/A | 126
PIN | sum<2> | 536871040 | 0 | N/A | 124
PIN | sum<3> | 536871040 | 0 | N/A | 129
PIN | sum<4> | 536871040 | 0 | N/A | 127
PIN | sum<5> | 536871040 | 0 | N/A | 131
PIN | sum<6> | 536871040 | 0 | N/A | 4
PIN | sum<7> | 536871040 | 0 | N/A | 5
ex3.mfd - 源码说明

本页面展示了「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][」中的 ex3.mfd 源码文件，采用 MFD 编程语言编写，共 611 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。
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