ex11.vm6

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· VM6 代码 · 共 721 行 · 第 1/3 页

VM6
721 行
字号
123
NODE | C1/N23$BUF0.D | 753 | ? | 0 | 0 | C1/N23$BUF0 | NULL | NULL | C1/N23$BUF0.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | C1/N23$BUF0.Q | 756 | ? | 0 | 0 | C1/N23$BUF0 | NULL | NULL | C1/N23$BUF0.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | OptxMapped | net0 | EX11_COPY_0_COPY_0 | 2155872256 | 3 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt<0> | 669 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | cnt<0>.Q | cnt<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt<1> | 670 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | cnt<1>.Q | cnt<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt<2> | 671 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | cnt<2>.Q | cnt<2> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | net0$Q | 676 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | net0.Q | net0 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | net0.UIM | 788 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | net0.Q | net0 | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | net0.SI | net0 | 0 | 3 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt<0> | 669 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | cnt<0>.Q | cnt<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt<1> | 670 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | cnt<1>.Q | cnt<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | cnt<2> | 671 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | cnt<2>.Q | cnt<2> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | net0.D1 | 758 | ? | 0 | 4096 | net0 | NULL | NULL | net0.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | net0.D2 | 759 | ? | 0 | 4096 | net0 | NULL | NULL | net0.SI | 2 | 9 | MC_SI_D2
SPPTERM | 3 | IV_FALSE | cnt<0> | IV_FALSE | cnt<1> | IV_FALSE | cnt<2>

SRFF_INSTANCE | net0.REG | net0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | net0.D | 757 | ? | 0 | 0 | net0 | NULL | NULL | net0.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | net0.Q | 760 | ? | 0 | 0 | net0 | NULL | NULL | net0.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | FbkInv+Merge+OptxMapped | N_row<2> | EX11_COPY_0_COPY_0 | 2155907072 | 0 | 2
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | N_row<2>$Q | 677 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N_row<2>.Q | N_row<2> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N_row<2>.UIM | 789 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N_row<2>.Q | N_row<2> | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | N_row<2>.SI | N_row<2> | 0 | 0 | 2
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N_row<2>.D1 | 762 | ? | 0 | 4096 | N_row<2> | NULL | NULL | N_row<2>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N_row<2>.D2 | 763 | ? | 0 | 4096 | N_row<2> | NULL | NULL | N_row<2>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 0 | IV_ZERO

SRFF_INSTANCE | N_row<2>.REG | N_row<2> | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N_row<2>.D | 761 | ? | 0 | 0 | N_row<2> | NULL | NULL | N_row<2>.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N_row<2>.Q | 764 | ? | 0 | 0 | N_row<2> | NULL | NULL | N_row<2>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | OptxMapped | N_row<2>$BUF0 | EX11_COPY_0_COPY_0 | 2155872256 | 0 | 2
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | N_row<2>$BUF0 | 678 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N_row<2>$BUF0.Q | N_row<2>$BUF0 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N_row<2>$BUF0.UIM | 790 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N_row<2>$BUF0.Q | N_row<2>$BUF0 | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | N_row<2>$BUF0.SI | N_row<2>$BUF0 | 0 | 0 | 2
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N_row<2>$BUF0.D1 | 766 | ? | 0 | 4096 | N_row<2>$BUF0 | NULL | NULL | N_row<2>$BUF0.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N_row<2>$BUF0.D2 | 767 | ? | 0 | 6144 | N_row<2>$BUF0 | NULL | NULL | N_row<2>$BUF0.SI | 2 | 9 | MC_SI_D2
SPPTERM | 0 | IV_ZERO

SRFF_INSTANCE | N_row<2>$BUF0.REG | N_row<2>$BUF0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N_row<2>$BUF0.D | 765 | ? | 0 | 0 | N_row<2>$BUF0 | NULL | NULL | N_row<2>$BUF0.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N_row<2>$BUF0.Q | 768 | ? | 0 | 0 | N_row<2>$BUF0 | NULL | NULL | N_row<2>$BUF0.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | OptxMapped | N_row<2>$BUF1 | EX11_COPY_0_COPY_0 | 2155872256 | 0 | 2
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | N_row<2>$BUF1 | 679 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N_row<2>$BUF1.Q | N_row<2>$BUF1 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N_row<2>$BUF1.UIM | 791 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N_row<2>$BUF1.Q | N_row<2>$BUF1 | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | N_row<2>$BUF1.SI | N_row<2>$BUF1 | 0 | 0 | 2
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N_row<2>$BUF1.D1 | 770 | ? | 0 | 4096 | N_row<2>$BUF1 | NULL | NULL | N_row<2>$BUF1.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N_row<2>$BUF1.D2 | 771 | ? | 0 | 6144 | N_row<2>$BUF1 | NULL | NULL | N_row<2>$BUF1.SI | 2 | 9 | MC_SI_D2
SPPTERM | 0 | IV_ZERO

SRFF_INSTANCE | N_row<2>$BUF1.REG | N_row<2>$BUF1 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N_row<2>$BUF1.D | 769 | ? | 0 | 0 | N_row<2>$BUF1 | NULL | NULL | N_row<2>$BUF1.XOR | 0 | 7 | ALU_F
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N_row<2>$BUF1.Q | 772 | ? | 0 | 0 | N_row<2>$BUF1 | NULL | NULL | N_row<2>$BUF1.REG | 0 | 8 | SRFF_Q

OUTPUT_INSTANCE | 0 | row<7> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | C1/N16$Q | 660 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | C1/N16.Q | C1/N16 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | row<7> | 680 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | row<7> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | col<3> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N34$Q | 661 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N34.Q | N34 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | col<3> | 681 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | col<3> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | col<4> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N36$Q | 662 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N36.Q | N36 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | col<4> | 682 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | col<4> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | col<5> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N38$Q | 663 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N38.Q | N38 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | col<5> | 683 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | col<5> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | col<6> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N40$Q | 664 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N40.Q | N40 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | col<6> | 684 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | col<6> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | col<1> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N30 | 665 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N30.Q | N30 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | col<1> | 685 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | col<1> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | col<2> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N32 | 666 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N32.Q | N32 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | col<2> | 686 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | col<2> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | row<6> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | C1/N23$Q | 667 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | C1/N23.Q | C1/N23 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | row<6> | 687 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | row<6> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | row<5> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | C1/N30 | 672 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | C1/N30.Q | C1/N30 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | row<5> | 688 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | row<5> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | col<0> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N29 | 673 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N29.Q | N29 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | col<0> | 689 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | col<0> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | row<3> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | C1/N16$BUF0 | 674 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | C1/N16$BUF0.Q | C1/N16$BUF0 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | row<3> | 690 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | row<3> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | row<4> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | C1/N23$BUF0 | 675 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | C1/N23$BUF0.Q | C1/N23$BUF0 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | row<4> | 691 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | row<4> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | col<7> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | net0$Q | 676 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | net0.Q | net0 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | col<7> | 692 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | col<7> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | row<2> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_row<2>$Q | 677 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N_row<2>.Q | N_row<2> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | row<2> | 693 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | row<2> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | row<1> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_row<2>$BUF0 | 678 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N_row<2>$BUF0.Q | N_row<2>$BUF0 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | row<1> | 694 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | row<1> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | row<0> | EX11_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_row<2>$BUF1 | 679 | ? | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | N_row<2>$BUF1.Q | N_row<2>$BUF1 | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | row<0> | 695 | PO | 0 | 0 | EX11_COPY_0_COPY_0 | NULL | NULL | row<0> | 0 | 6 | OI_OUT

FB_INSTANCE | FOOBAR1_ | EX11_COPY_0_COPY_0 | 0 | 0 | 0
FBPIN | 11 | NULL | 0 | N_clk | 0 | NULL | 0 | 10 | 57344

FB_INSTANCE | FOOBAR2_ | EX11_COPY_0_COPY_0 | 0 | 0 | 0
FBPIN | 2 | N_row<2>$BUF0 | 1 | NULL | 0 | row<1> | 1 | 69 | 49152
FBPIN | 4 | N_row<2> | 1 | NULL | 0 | row<2> | 1 | 68 | 49152
FBPIN | 5 | C1/N23$BUF0 | 1 | NULL | 0 | row<4> | 1 | 70 | 49152
FBPIN | 6 | C1/N16$BUF0 | 1 | NULL | 0 | row<3> | 1 | 71 | 49152
FBPIN | 7 | C1/N23 | 1 | NULL | 0 | row<6> | 1 | 76 | 53248
FBPIN | 8 | C1/N30 | 1 | NULL | 0 | row<5> | 1 | 72 | 49152
FBPIN | 11 | C1/N16 | 1 | NULL | 0 | row<7> | 1 | 77 | 53248
FBPIN | 16 | cnt<2> | 1 | NULL | 0 | NULL | 0 | 82 | 49152
FBPIN | 17 | cnt<1> | 1 | NULL | 0 | NULL | 0 | 84 | 49152
FBPIN | 18 | cnt<0> | 1 | NULL | 0 | NULL | 0

FB_INSTANCE | FOOBAR3_ | EX11_COPY_0_COPY_0 | 0 | 0 | 0
FBPIN | 16 | N29 | 1 | NULL | 0 | col<0> | 1 | 45 | 49152

FB_INSTANCE | FOOBAR4_ | EX11_COPY_0_COPY_0 | 0 | 0 | 0
FBPIN | 1 | N30 | 1 | NULL | 0 | col<1> | 1 | 46 | 49152
FBPIN | 3 | N36 | 1 | NULL | 0 | col<4> | 1 | 51 | 49152
FBPIN | 5 | N32 | 1 | NULL | 0 | col<2> | 1 | 47 | 49152
FBPIN | 7 | N40 | 1 | NULL | 0 | col<6> | 1 | 55 | 49152
FBPIN | 8 | N34 | 1 | NULL | 0 | col<3> | 1 | 48 | 49152
FBPIN | 10 | net0 | 1 | NULL | 0 | col<7> | 1 | 57 | 49152
FBPIN | 11 | N38 | 1 | NULL | 0 | col<5> | 1 | 53 | 49152
FBPIN | 17 | N_row<2>$BUF1 | 1 | NULL | 0 | row<0> | 1 | 66 | 49152

FB_INSTANCE | INPUTPINS_FOOBAR5_ | EX11_COPY_0_COPY_0 | 0 | 0 | 0

FB_ORDER_OF_INPUTS | FOOBAR2_ | 15 | cnt<2>.FBK | NULL | 16 | cnt<1>.FBK | NULL | 17 | cnt<0>.FBK | NULL

FB_IMUX_INDEX | FOOBAR2_ | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 15 | 16 | 17 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1


FB_ORDER_OF_INPUTS | FOOBAR3_ | 0 | cnt<0> | NULL | 1 | cnt<1> | NULL | 2 | cnt<2> | NULL

FB_IMUX_INDEX | FOOBAR3_ | 999 | 999 | 999 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1


FB_ORDER_OF_INPUTS | FOOBAR4_ | 0 | cnt<0> | NULL | 1 | cnt<1> | NULL | 2 | cnt<2> | NULL

FB_IMUX_INDEX | FOOBAR4_ | 999 | 999 | 999 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1


GLOBAL_FCLK | FCLKIO_0 | 1 | 1
123

ex11.vm6 - 源码说明

本页面展示了「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][」中的 ex11.vm6 源码文件，采用 VM6 编程语言编写，共 721 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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