time_sim.edn

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· EDN 代码 · 共 1,650 行 · 第 1/5 页

(edif ex11
  (edifVersion 2 0 0)
  (edifLevel 0)
  (keywordMap (keywordLevel 0))
  (status
    (written
      (timestamp 2008 3 18 8 51 0)
      (program "Xilinx ngd2edif" (version "E.38"))
      (comment "Command line: -w -v fndtn ex11.nga time_sim.edn ")))
  (external SIMPRIMS
    (edifLevel 0)
    (technology (numberDefinition
      (scale 1 (E 1 -12) (unit TIME))))
    (cell x_opad
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port PAD
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_buf
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port IN
              (direction INPUT)
            )
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_zero
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_or2
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port IN0
              (direction INPUT)
            )
            (port IN1
              (direction INPUT)
            )
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_and2
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port IN0
              (direction INPUT)
            )
            (port IN1
              (direction INPUT)
            )
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_and3
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port IN0
              (direction INPUT)
            )
            (port IN1
              (direction INPUT)
            )
            (port IN2
              (direction INPUT)
            )
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_xor2
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port IN0
              (direction INPUT)
            )
            (port IN1
              (direction INPUT)
            )
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_ff
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port IN
              (direction INPUT)
            )
            (port CE
              (direction INPUT)
            )
            (port CLK
              (direction INPUT)
            )
            (port SET
              (direction INPUT)
            )
            (port RST
              (direction INPUT)
            )
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_one
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
    (cell x_ipad
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port PAD
              (direction INPUT)
            )
          )
      )
    )
    (cell x_inv
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port IN
              (direction INPUT)
            )
            (port OUT
              (direction OUTPUT)
            )
          )
      )
    )
  )

  (library ex11_lib
    (edifLevel 0)
    (technology (numberDefinition
      (scale 1 (E 1 -12) (unit TIME))))
    (cell ex11
      (cellType GENERIC)
        (view view_1
          (viewType NETLIST)
          (interface
            (port (rename row_7__ "row<7>")
              (direction OUTPUT)
              (designator "77")
            )
            (port (rename col_3__ "col<3>")
              (direction OUTPUT)
              (designator "48")
            )
            (port (rename col_4__ "col<4>")
              (direction OUTPUT)
              (designator "51")
            )
            (port (rename col_5__ "col<5>")
              (direction OUTPUT)
              (designator "53")
            )
            (port (rename col_6__ "col<6>")
              (direction OUTPUT)
              (designator "55")
            )
            (port (rename col_1__ "col<1>")
              (direction OUTPUT)
              (designator "46")
            )
            (port (rename col_2__ "col<2>")
              (direction OUTPUT)
              (designator "47")
            )
            (port (rename row_6__ "row<6>")
              (direction OUTPUT)
              (designator "76")
            )
            (port clk
              (direction INPUT)
              (designator "10")
            )
            (port (rename row_5__ "row<5>")
              (direction OUTPUT)
              (designator "72")
            )
            (port (rename col_0__ "col<0>")
              (direction OUTPUT)
              (designator "45")
            )
            (port (rename row_3__ "row<3>")
              (direction OUTPUT)
              (designator "71")
            )
            (port (rename row_4__ "row<4>")
              (direction OUTPUT)
              (designator "70")
            )
            (port (rename col_7__ "col<7>")
              (direction OUTPUT)
              (designator "57")
            )
            (port (rename row_2__ "row<2>")
              (direction OUTPUT)
              (designator "68")
            )
            (port (rename row_1__ "row<1>")
              (direction OUTPUT)
              (designator "69")
            )
            (port (rename row_0__ "row<0>")
              (direction OUTPUT)
              (designator "66")
            )
            (designator "XC9572-7-PC84")
          )
          (contents
            (instance row_7__PAD
              (viewRef view_1 (cellRef x_opad (libraryRef SIMPRIMS)))
            )
            (instance (rename row_7___8 "row_7_&_8")
              (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS)))
              (portInstance OUT
                (property RISE (integer 2500) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 2500) (unit TIME) (owner "Xilinx"))
              )
            )
            (instance C1_N16_Q_9
              (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS)))
            )
            (instance C1_N16_REG
              (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS)))
              (portInstance OUT
                (property RISE (integer 500) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 500) (unit TIME) (owner "Xilinx"))
              )
            )
            (instance GND_ZERO
              (viewRef view_1 (cellRef x_zero (libraryRef SIMPRIMS)))
            )
            (instance C1_N16_D1_10
              (viewRef view_1 (cellRef x_or2 (libraryRef SIMPRIMS)))
            )
            (instance C1_N16_D2_PT_0_11
              (viewRef view_1 (cellRef x_and2 (libraryRef SIMPRIMS)))
              (portInstance IN0
                (property RISE (integer 6000) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 6000) (unit TIME) (owner "Xilinx"))
              )
              (portInstance IN1
                (property RISE (integer 6000) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 6000) (unit TIME) (owner "Xilinx"))
              )
            )
            (instance C1_N16_D2_PT_1_12
              (viewRef view_1 (cellRef x_and3 (libraryRef SIMPRIMS)))
              (portInstance IN0
                (property RISE (integer 6000) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 6000) (unit TIME) (owner "Xilinx"))
              )
              (portInstance IN1
                (property RISE (integer 6000) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 6000) (unit TIME) (owner "Xilinx"))
              )
              (portInstance IN2
                (property RISE (integer 6000) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 6000) (unit TIME) (owner "Xilinx"))
              )
            )
            (instance C1_N16_D2_13
              (viewRef view_1 (cellRef x_or2 (libraryRef SIMPRIMS)))
            )
            (instance C1_N16_XOR
              (viewRef view_1 (cellRef x_xor2 (libraryRef SIMPRIMS)))
            )
            (instance (rename cnt_2___14 "cnt_2_&_14")
              (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS)))
            )
            (instance cnt_2__REG
              (viewRef view_1 (cellRef x_ff (libraryRef SIMPRIMS)))
              (property SUINHICLK (integer 1500) (unit TIME) (owner "Xilinx"))
              (property SUINLOCLK (integer 1500) (unit TIME) (owner "Xilinx"))
              (property HOLDINHICLK (integer 3000) (unit TIME) (owner "Xilinx"))