cnt10.out

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· OUT 代码 · 共 27 行

OUT
27
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Warning: Variable 'cqi' is being read 
	in routine cnt10 line 17 in file 'D:/temp/eda6000/xc95/ex10/cnt10.vhd', 
	but is not in the process sensitivity list of the block which begins 
	there.   (HDL-179)

Inferred memory devices in process 
	in routine cnt10 line 17 in file
         'D:/temp/eda6000/xc95/ex10/cnt10.vhd'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|      cout_reg       | Flip-flop |   1   |  -  | -  | Y  | N  | N  | N  | N  |
|       cqi_reg       | Flip-flop |   4   |  Y  | N  | Y  | N  | N  | N  | N  |
===============================================================================

cout_reg
--------
    Async-reset: rst


cqi_reg (width 4)
-----------------
    Async-reset: rst


Writing to hnl file 'd:\temp\EDA6000\XC95\EX10\ex10/workdirs/WORK/cnt10.hnl'

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