ex10.mfd

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· MFD 代码 · 共 479 行 · 第 1/2 页

MFD

479 行

ATTRIBUTES | 4391728 | 0
OUTPUTMC | 4 | 1 | 8 | 1 | 13 | 0 | 17 | 0 | 13
INPUTS | 7 | dout2<2>.FBK".LFBK  | dout2<1>.FBK".LFBK  | dout2<3>.FBK".LFBK  | p_cnt_en.PIN  | cout1  | clk1Hz  | dout2<0>.FBK".LFBK
INPUTMC | 5 | 0 | 7 | 0 | 17 | 0 | 13 | 1 | 9 | 0 | 8
INPUTP | 2 | 66 | 21
EQ | 7 | 
    "dout2<3>".T  =  "dout2<0>.FBK".LFBK * "dout2<1>.FBK".LFBK * 
	"dout2<2>.FBK".LFBK * p_cnt_en.PIN
	+ "dout2<0>.FBK".LFBK * /"dout2<1>.FBK".LFBK * 
	/"dout2<2>.FBK".LFBK * "dout2<3>.FBK".LFBK * p_cnt_en.PIN
    "dout2<3>".CLKF  =  cout1
    "dout2<3>".RSTF  =  /clk1Hz * /p_cnt_en.PIN
    "dout2<3>".PRLD  =  GND

MACROCELL | 0 | 12 | dout3<3>
ATTRIBUTES | 4391728 | 0
OUTPUTMC | 3 | 0 | 16 | 0 | 12 | 0 | 0
INPUTS | 7 | dout3<2>.FBK".LFBK  | dout3<1>.FBK".LFBK  | dout3<3>.FBK".LFBK  | p_cnt_en.PIN  | cout2  | clk1Hz  | dout3<0>.FBK".LFBK
INPUTMC | 5 | 0 | 5 | 0 | 16 | 0 | 12 | 1 | 8 | 0 | 6
INPUTP | 2 | 66 | 21
EQ | 7 | 
    "dout3<3>".T  =  "dout3<0>.FBK".LFBK * "dout3<1>.FBK".LFBK * 
	"dout3<2>.FBK".LFBK * p_cnt_en.PIN
	+ "dout3<0>.FBK".LFBK * /"dout3<1>.FBK".LFBK * 
	/"dout3<2>.FBK".LFBK * "dout3<3>.FBK".LFBK * p_cnt_en.PIN
    "dout3<3>".CLKF  =  cout2
    "dout3<3>".RSTF  =  /clk1Hz * /p_cnt_en.PIN
    "dout3<3>".PRLD  =  GND

MACROCELL | 3 | 3 | N_p_cnt_en
ATTRIBUTES | 8880898 | 0
OUTPUTMC | 6 | 3 | 15 | 3 | 17 | 3 | 3 | 3 | 13 | 3 | 16 | 3 | 11
INPUTS | 1 | N_p_cnt_en.FBK.LFBK
INPUTMC | 1 | 3 | 3
EQ | 3 | 
    p_cnt_en  :=  /N_p_cnt_en.FBK.LFBK
    p_cnt_en.CLKF  =  clk1Hz	;FCLK/GCK
    p_cnt_en.PRLD  =  GND
GLOBALS | 1 | 2 | clk1Hz

MACROCELL | 3 | 13 | N_p_rst_cnt
ATTRIBUTES | 396034 | 0
INPUTS | 2 | clk1Hz  | N_p_cnt_en.FBK.LFBK
INPUTMC | 1 | 3 | 3
INPUTP | 1 | 21
EQ | 1 | 
    p_rst_cnt  =  /clk1Hz * /N_p_cnt_en.FBK.LFBK

MACROCELL | 3 | 16 | N_led0<0>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | N_p_cnt_en.FBK.LFBK  | dout0<0>.FBK".LFBK
INPUTMC | 2 | 3 | 3 | 3 | 15
EQ | 3 | 
    "led0<0>"  :=  "dout0<0>.FBK".LFBK
    "led0<0>".CLKF  =  /N_p_cnt_en.FBK.LFBK
    "led0<0>".PRLD  =  GND

MACROCELL | 1 | 1 | N_led0<1>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | dout0<1>  | p_cnt_en.PIN
INPUTMC | 1 | 0 | 15
INPUTP | 1 | 66
EQ | 3 | 
    "led0<1>"  :=  "dout0<1>"
    "led0<1>".CLKF  =  /p_cnt_en.PIN
    "led0<1>".PRLD  =  GND

MACROCELL | 1 | 3 | N_led0<2>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | dout0<2>  | p_cnt_en.PIN
INPUTMC | 1 | 0 | 3
INPUTP | 1 | 66
EQ | 3 | 
    "led0<2>"  :=  "dout0<2>"
    "led0<2>".CLKF  =  /p_cnt_en.PIN
    "led0<2>".PRLD  =  GND

MACROCELL | 1 | 5 | N_led0<3>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | dout0<3>  | p_cnt_en.PIN
INPUTMC | 1 | 0 | 10
INPUTP | 1 | 66
EQ | 3 | 
    "led0<3>"  :=  "dout0<3>"
    "led0<3>".CLKF  =  /p_cnt_en.PIN
    "led0<3>".PRLD  =  GND

MACROCELL | 1 | 4 | N_led1<0>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | dout1<0>  | p_cnt_en.PIN
INPUTMC | 1 | 3 | 17
INPUTP | 1 | 66
EQ | 3 | 
    "led1<0>"  :=  "dout1<0>"
    "led1<0>".CLKF  =  /p_cnt_en.PIN
    "led1<0>".PRLD  =  GND

MACROCELL | 1 | 7 | N_led1<1>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | p_cnt_en.PIN  | dout1<1>.FBK".LFBK
INPUTMC | 1 | 1 | 17
INPUTP | 1 | 66
EQ | 3 | 
    "led1<1>"  :=  "dout1<1>.FBK".LFBK
    "led1<1>".CLKF  =  /p_cnt_en.PIN
    "led1<1>".PRLD  =  GND

MACROCELL | 1 | 6 | N_led1<2>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | dout1<2>  | p_cnt_en.PIN
INPUTMC | 1 | 0 | 9
INPUTP | 1 | 66
EQ | 3 | 
    "led1<2>"  :=  "dout1<2>"
    "led1<2>".CLKF  =  /p_cnt_en.PIN
    "led1<2>".PRLD  =  GND

MACROCELL | 1 | 10 | N_led1<3>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | dout1<3>  | p_cnt_en.PIN
INPUTMC | 1 | 0 | 14
INPUTP | 1 | 66
EQ | 3 | 
    "led1<3>"  :=  "dout1<3>"
    "led1<3>".CLKF  =  /p_cnt_en.PIN
    "led1<3>".PRLD  =  GND

MACROCELL | 1 | 12 | N_led2<0>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | dout2<0>  | p_cnt_en.PIN
INPUTMC | 1 | 0 | 8
INPUTP | 1 | 66
EQ | 3 | 
    "led2<0>"  :=  "dout2<0>"
    "led2<0>".CLKF  =  /p_cnt_en.PIN
    "led2<0>".PRLD  =  GND

MACROCELL | 1 | 11 | N_led2<1>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | dout2<1>  | p_cnt_en.PIN
INPUTMC | 1 | 0 | 17
INPUTP | 1 | 66
EQ | 3 | 
    "led2<1>"  :=  "dout2<1>"
    "led2<1>".CLKF  =  /p_cnt_en.PIN
    "led2<1>".PRLD  =  GND

MACROCELL | 1 | 15 | N_led2<2>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | dout2<2>  | p_cnt_en.PIN
INPUTMC | 1 | 0 | 7
INPUTP | 1 | 66
EQ | 3 | 
    "led2<2>"  :=  "dout2<2>"
    "led2<2>".CLKF  =  /p_cnt_en.PIN
    "led2<2>".PRLD  =  GND

MACROCELL | 1 | 13 | N_led2<3>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | dout2<3>  | p_cnt_en.PIN
INPUTMC | 1 | 0 | 13
INPUTP | 1 | 66
EQ | 3 | 
    "led2<3>"  :=  "dout2<3>"
    "led2<3>".CLKF  =  /p_cnt_en.PIN
    "led2<3>".PRLD  =  GND

MACROCELL | 1 | 16 | N_led3<0>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | dout3<0>  | p_cnt_en.PIN
INPUTMC | 1 | 0 | 6
INPUTP | 1 | 66
EQ | 3 | 
    "led3<0>"  :=  "dout3<0>"
    "led3<0>".CLKF  =  /p_cnt_en.PIN
    "led3<0>".PRLD  =  GND

MACROCELL | 1 | 14 | N_led3<1>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | dout3<1>  | p_cnt_en.PIN
INPUTMC | 1 | 0 | 16
INPUTP | 1 | 66
EQ | 3 | 
    "led3<1>"  :=  "dout3<1>"
    "led3<1>".CLKF  =  /p_cnt_en.PIN
    "led3<1>".PRLD  =  GND

MACROCELL | 0 | 4 | N_led3<2>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | p_cnt_en.PIN  | dout3<2>.FBK".LFBK
INPUTMC | 1 | 0 | 5
INPUTP | 1 | 66
EQ | 3 | 
    "led3<2>"  :=  "dout3<2>.FBK".LFBK
    "led3<2>".CLKF  =  /p_cnt_en.PIN
    "led3<2>".PRLD  =  GND

MACROCELL | 0 | 0 | N_led3<3>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | p_cnt_en.PIN  | dout3<3>.FBK".LFBK
INPUTMC | 1 | 0 | 12
INPUTP | 1 | 66
EQ | 3 | 
    "led3<3>"  :=  "dout3<3>.FBK".LFBK
    "led3<3>".CLKF  =  /p_cnt_en.PIN
    "led3<3>".PRLD  =  GND

MACROCELL | 3 | 11 | N636
ATTRIBUTES | 8815366 | 0
INPUTS | 1 | N_p_cnt_en.FBK.LFBK
INPUTMC | 1 | 3 | 3
EQ | 3 | 
    p_load  :=  N_p_cnt_en.FBK.LFBK
    p_load.CLKF  =  clk1Hz	;FCLK/GCK
    p_load.PRLD  =  VCC
GLOBALS | 1 | 2 | clk1Hz

PIN | uclk | 4096 | 0 | N/A | 20 | 5 | 3 | 15 | 0 | 11 | 0 | 3 | 0 | 15 | 0 | 10
PIN | clk1Hz | 8256 | 0 | N/A | 21 | 22 | 3 | 15 | 3 | 17 | 0 | 8 | 0 | 6 | 0 | 11 | 1 | 9 | 0 | 3 | 0 | 9 | 0 | 7 | 0 | 5 | 1 | 8 | 0 | 15 | 1 | 17 | 0 | 17 | 0 | 16 | 0 | 10 | 0 | 14 | 0 | 13 | 0 | 12 | 3 | 13 | 3 | 3 | 3 | 11
PIN | p_rst_cnt | 536871040 | 0 | N/A | 71
PIN | led0<0> | 536871040 | 0 | N/A | 82
PIN | led0<1> | 536871040 | 0 | N/A | 86
PIN | led0<2> | 536871040 | 0 | N/A | 85
PIN | led0<3> | 536871040 | 0 | N/A | 88
PIN | led1<0> | 536871040 | 0 | N/A | 87
PIN | led1<1> | 536871040 | 0 | N/A | 89
PIN | led1<2> | 536871040 | 0 | N/A | 2
PIN | led1<3> | 536871040 | 0 | N/A | 3
PIN | led2<0> | 536871040 | 0 | N/A | 6
PIN | led2<1> | 536871040 | 0 | N/A | 5
PIN | led2<2> | 536871040 | 0 | N/A | 8
PIN | led2<3> | 536871040 | 0 | N/A | 7
PIN | led3<0> | 536871040 | 0 | N/A | 10
PIN | led3<1> | 536871040 | 0 | N/A | 9
PIN | led3<2> | 536871040 | 0 | N/A | 12
PIN | led3<3> | 536871040 | 0 | N/A | 14
PIN | p_load | 536871040 | 0 | N/A | 74
PIN | p_cnt_en | 536870976 | 0 | N/A | 66 | 32 | 1 | 13 | 1 | 15 | 1 | 11 | 1 | 12 | 1 | 10 | 1 | 6 | 1 | 7 | 1 | 4 | 1 | 5 | 1 | 3 | 1 | 1 | 1 | 16 | 1 | 14 | 0 | 4 | 0 | 12 | 0 | 13 | 0 | 14 | 0 | 10 | 0 | 16 | 0 | 17 | 1 | 17 | 0 | 15 | 1 | 8 | 0 | 5 | 0 | 7 | 0 | 9 | 0 | 3 | 1 | 9 | 0 | 11 | 0 | 6 | 0 | 8 | 0 | 0

ex10.mfd - 源码说明

本页面展示了「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][」中的 ex10.mfd 源码文件，采用 MFD 编程语言编写，共 479 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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