ex12.gyd

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· GYD 代码 · 共 32 行

Pin Freeze File:  version E.38

957284 XC9572-7-PC84
clk S:PIN36
clr S:PIN35
d<0> S:PIN20
d<1> S:PIN23
d<2> S:PIN24
d<3> S:PIN25
d<4> S:PIN26
d<5> S:PIN31
d<6> S:PIN34
d<7> S:PIN32
din S:PIN33
err<2> S:PIN58
err<0> S:PIN56
err<3> S:PIN61
err<1> S:PIN52


;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.




PARTITION FB4_1 "q<0>" "q<3>"
PARTITION FB4_4 "N_err<3>$BUF0"
PARTITION FB4_12 N37 "N_err<3>" "N_err<0>" "q<2>"
		 EXP0_ "q<1>" EXP1_