ex12.vm6

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· VM6 代码 · 共 662 行 · 第 1/3 页

VM6
662 行
字号
123
SIGNAL | NODE | q<0>.D1 | 666 | ? | 0 | 4096 | q<0> | NULL | NULL | q<0>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | q<0>.D2 | 667 | ? | 0 | 4096 | q<0> | NULL | NULL | q<0>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | EXP1_.EXP
SPPTERM | 6 | IV_TRUE | N_din | IV_TRUE | N_d<1> | IV_TRUE | q<1>.FBK | IV_FALSE | q<0>.FBK | IV_TRUE | q<2>.FBK | IV_FALSE | q<3>.FBK
SPPTERM | 6 | IV_TRUE | N_din | IV_TRUE | N_d<3> | IV_FALSE | q<1>.FBK | IV_FALSE | q<0>.FBK | IV_TRUE | q<2>.FBK | IV_FALSE | q<3>.FBK
SPPTERM | 6 | IV_FALSE | N_din | IV_FALSE | N_d<1> | IV_TRUE | q<1>.FBK | IV_FALSE | q<0>.FBK | IV_TRUE | q<2>.FBK | IV_FALSE | q<3>.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | q<0>.CLKF | 668 | ? | 0 | 4096 | q<0> | NULL | NULL | q<0>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | q<0>.RSTF | 669 | ? | 0 | 4096 | q<0> | NULL | NULL | q<0>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | N_clr

SRFF_INSTANCE | q<0>.REG | q<0> | 0 | 3 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | q<0>.D | 665 | ? | 0 | 0 | q<0> | NULL | NULL | q<0>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | q<0>.CLKF | 668 | ? | 0 | 4096 | q<0> | NULL | NULL | q<0>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | q<0>.RSTF | 669 | ? | 0 | 4096 | q<0> | NULL | NULL | q<0>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | N_clr
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | q<0>.Q | 670 | ? | 0 | 0 | q<0> | NULL | NULL | q<0>.REG | 0 | 8 | SRFF_Q

INPUT_INSTANCE | 0 | 0 | NULL | N_d<4> | EX12_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | d<4> | 652 | PI | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_d<4> | 634 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<4> | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PrldLow+OptxMapped+ClkInv | q<2> | EX12_COPY_0_COPY_0 | 2222982144 | 10 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<0>.FBK | 704 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<0>.Q | q<0> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<2>.FBK | 705 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<2>.Q | q<2> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<3>.FBK | 706 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<3>.Q | q<3> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din | 628 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_din | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_d<1> | 631 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_d<4> | 634 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<4> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_err<0>.EXP | 700 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | N_err<0>.EXP | N_err<0> | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<1>.FBK | 703 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<1>.Q | q<1> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 622 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clr | 623 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_clr | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | q<2> | 626 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<2>.Q | q<2> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | q<2>.FBK | 705 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<2>.Q | q<2> | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | q<2>.SI | q<2> | 0 | 10 | 4
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<0>.FBK | 704 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<0>.Q | q<0> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<2>.FBK | 705 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<2>.Q | q<2> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<3>.FBK | 706 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<3>.Q | q<3> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din | 628 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_din | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_d<1> | 631 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_d<4> | 634 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<4> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_err<0>.EXP | 700 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | N_err<0>.EXP | N_err<0> | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<1>.FBK | 703 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<1>.Q | q<1> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 622 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clr | 623 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_clr | 0 | 5 | II_IMUX
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | q<2>.D1 | 672 | ? | 0 | 4096 | q<2> | NULL | NULL | q<2>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | q<2>.D2 | 673 | ? | 0 | 4096 | q<2> | NULL | NULL | q<2>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | N_err<0>.EXP
SPPTERM | 6 | IV_TRUE | N_din | IV_TRUE | N_d<1> | IV_TRUE | q<1>.FBK | IV_FALSE | q<0>.FBK | IV_TRUE | q<2>.FBK | IV_FALSE | q<3>.FBK
SPPTERM | 6 | IV_TRUE | N_din | IV_TRUE | N_d<4> | IV_TRUE | q<1>.FBK | IV_TRUE | q<0>.FBK | IV_FALSE | q<2>.FBK | IV_FALSE | q<3>.FBK
SPPTERM | 6 | IV_FALSE | N_din | IV_FALSE | N_d<1> | IV_TRUE | q<1>.FBK | IV_FALSE | q<0>.FBK | IV_TRUE | q<2>.FBK | IV_FALSE | q<3>.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | q<2>.CLKF | 674 | ? | 0 | 4096 | q<2> | NULL | NULL | q<2>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | q<2>.RSTF | 675 | ? | 0 | 4096 | q<2> | NULL | NULL | q<2>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | N_clr

SRFF_INSTANCE | q<2>.REG | q<2> | 0 | 3 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | q<2>.D | 671 | ? | 0 | 0 | q<2> | NULL | NULL | q<2>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | q<2>.CLKF | 674 | ? | 0 | 4096 | q<2> | NULL | NULL | q<2>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | q<2>.RSTF | 675 | ? | 0 | 4096 | q<2> | NULL | NULL | q<2>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | N_clr
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | q<2>.Q | 676 | ? | 0 | 0 | q<2> | NULL | NULL | q<2>.REG | 0 | 8 | SRFF_Q

INPUT_INSTANCE | 0 | 0 | NULL | N_d<0> | EX12_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | d<0> | 654 | PI | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_d<0> | 636 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<0> | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PrldLow+OptxMapped+ClkInv | q<3> | EX12_COPY_0_COPY_0 | 2222982144 | 8 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<0>.FBK | 704 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<0>.Q | q<0> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<2>.FBK | 705 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<2>.Q | q<2> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<3>.FBK | 706 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<3>.Q | q<3> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din | 628 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_din | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_d<0> | 636 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 622 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clr | 623 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_clr | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<1>.FBK | 703 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<1>.Q | q<1> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | q<3> | 627 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<3>.Q | q<3> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | q<3>.FBK | 706 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<3>.Q | q<3> | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | q<3>.SI | q<3> | 0 | 8 | 4
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<0>.FBK | 704 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<0>.Q | q<0> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<2>.FBK | 705 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<2>.Q | q<2> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<3>.FBK | 706 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<3>.Q | q<3> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din | 628 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_din | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_d<0> | 636 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<0> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 622 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clr | 623 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_clr | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<1>.FBK | 703 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<1>.Q | q<1> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | q<3>.D1 | 678 | ? | 0 | 4096 | q<3> | NULL | NULL | q<3>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | q<3>.D2 | 679 | ? | 0 | 4096 | q<3> | NULL | NULL | q<3>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 6 | IV_TRUE | N_din | IV_TRUE | N_d<0> | IV_TRUE | q<1>.FBK | IV_TRUE | q<0>.FBK | IV_TRUE | q<2>.FBK | IV_FALSE | q<3>.FBK
SPPTERM | 6 | IV_FALSE | N_din | IV_FALSE | N_d<0> | IV_TRUE | q<1>.FBK | IV_TRUE | q<0>.FBK | IV_TRUE | q<2>.FBK | IV_FALSE | q<3>.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | q<3>.CLKF | 680 | ? | 0 | 4096 | q<3> | NULL | NULL | q<3>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | q<3>.RSTF | 681 | ? | 0 | 4096 | q<3> | NULL | NULL | q<3>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | N_clr

SRFF_INSTANCE | q<3>.REG | q<3> | 0 | 3 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | q<3>.D | 677 | ? | 0 | 0 | q<3> | NULL | NULL | q<3>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | q<3>.CLKF | 680 | ? | 0 | 4096 | q<3> | NULL | NULL | q<3>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | q<3>.RSTF | 681 | ? | 0 | 4096 | q<3> | NULL | NULL | q<3>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | N_clr
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | q<3>.Q | 682 | ? | 0 | 0 | q<3> | NULL | NULL | q<3>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | FbkInv+Merge+OptxMapped | N_err<0> | EX12_COPY_0_COPY_0 | 2155907072 | 9 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<0>.FBK | 704 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<0>.Q | q<0> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<2>.FBK | 705 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<2>.Q | q<2> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<3>.FBK | 706 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<3>.Q | q<3> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din | 628 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_din | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_d<4> | 634 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<4> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_d<2> | 635 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_d<3> | 632 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_err<3>.EXP | 699 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | N_err<3>.EXP | N_err<3> | 4 | 0 | MC_EXPORT
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<1>.FBK | 703 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<1>.Q | q<1> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | N_err<0>$Q | 637 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | N_err<0>.Q | N_err<0> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N_err<0>.UIM | 708 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | N_err<0>.Q | N_err<0> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
NODE | N_err<0>.EXP | 700 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | N_err<0>.EXP | N_err<0> | 4 | 0 | MC_EXPORT

SIGNAL_INSTANCE | N_err<0>.SI | N_err<0> | 0 | 9 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<0>.FBK | 704 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<0>.Q | q<0> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<2>.FBK | 705 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<2>.Q | q<2> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | q<3>.FBK | 706 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | q<3>.Q | q<3> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din | 628 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_din | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_d<4> | 634 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<4> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_d<2> | 635 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_d<3> | 632 | ? | 0 | 0 | EX12_COPY_0_COPY_0 | NULL | NULL | N_d<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
123

ex12.vm6 - 源码说明

本页面展示了「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][」中的 ex12.vm6 源码文件，采用 VM6 编程语言编写，共 662 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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