ex8.vm6
来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· VM6 代码 · 共 351 行 · 第 1/2 页
VM6
351 行
SIGNAL_INSTANCE | N_outy<2>.SI | N_outy<2> | 0 | 5 | 4
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_ena | 224 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | N_ena | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_outy<1>.FBK | 271 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<1>.Q | N_outy<1> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 223 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_rst | 225 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | N_rst | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_outy<0>.FBK | 270 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<0>.Q | N_outy<0> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N_outy<2>.D1 | 259 | ? | 0 | 0 | N_outy<2> | NULL | NULL | N_outy<2>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N_outy<2>.D2 | 260 | ? | 0 | 4096 | N_outy<2> | NULL | NULL | N_outy<2>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 3 | IV_TRUE | N_ena | IV_TRUE | N_outy<0>.FBK | IV_TRUE | N_outy<1>.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | N_outy<2>.CLKF | 261 | ? | 0 | 4096 | N_outy<2> | NULL | NULL | N_outy<2>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | N_outy<2>.RSTF | 262 | ? | 0 | 4096 | N_outy<2> | NULL | NULL | N_outy<2>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | N_rst
SRFF_INSTANCE | N_outy<2>.REG | N_outy<2> | 0 | 3 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N_outy<2>.D | 258 | ? | 0 | 0 | N_outy<2> | NULL | NULL | N_outy<2>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | N_outy<2>.CLKF | 261 | ? | 0 | 4096 | N_outy<2> | NULL | NULL | N_outy<2>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | N_outy<2>.RSTF | 262 | ? | 0 | 4096 | N_outy<2> | NULL | NULL | N_outy<2>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | N_rst
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N_outy<2>.Q | 263 | ? | 0 | 0 | N_outy<2> | NULL | NULL | N_outy<2>.REG | 0 | 8 | SRFF_Q
MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+OeInv | N_outy<3> | EX8_COPY_0_COPY_0 | 2290095104 | 6 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_ena | 224 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | N_ena | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_outy<1>.FBK | 271 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<1>.Q | N_outy<1> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_outy<2>.FBK | 272 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<2>.Q | N_outy<2> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 223 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_rst | 225 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | N_rst | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_outy<0>.FBK | 270 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<0>.Q | N_outy<0> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | N_outy<3>$Q | 232 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<3>.Q | N_outy<3> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N_outy<3> | 233 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<3>.Q | N_outy<3> | 1 | 0 | MC_UIM
SIGNAL_INSTANCE | N_outy<3>.SI | N_outy<3> | 0 | 6 | 4
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_ena | 224 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | N_ena | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_outy<1>.FBK | 271 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<1>.Q | N_outy<1> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_outy<2>.FBK | 272 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<2>.Q | N_outy<2> | 5 | 0 | MC_FBK
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 223 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_rst | 225 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | N_rst | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_outy<0>.FBK | 270 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<0>.Q | N_outy<0> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N_outy<3>.D1 | 265 | ? | 0 | 0 | N_outy<3> | NULL | NULL | N_outy<3>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N_outy<3>.D2 | 266 | ? | 0 | 4096 | N_outy<3> | NULL | NULL | N_outy<3>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 4 | IV_TRUE | N_ena | IV_TRUE | N_outy<0>.FBK | IV_TRUE | N_outy<1>.FBK | IV_TRUE | N_outy<2>.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | N_outy<3>.CLKF | 267 | ? | 0 | 4096 | N_outy<3> | NULL | NULL | N_outy<3>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | N_outy<3>.RSTF | 268 | ? | 0 | 4096 | N_outy<3> | NULL | NULL | N_outy<3>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | N_rst
SRFF_INSTANCE | N_outy<3>.REG | N_outy<3> | 0 | 3 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N_outy<3>.D | 264 | ? | 0 | 0 | N_outy<3> | NULL | NULL | N_outy<3>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | N_outy<3>.CLKF | 267 | ? | 0 | 4096 | N_outy<3> | NULL | NULL | N_outy<3>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | N_outy<3>.RSTF | 268 | ? | 0 | 4096 | N_outy<3> | NULL | NULL | N_outy<3>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | N_rst
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N_outy<3>.Q | 269 | ? | 0 | 0 | N_outy<3> | NULL | NULL | N_outy<3>.REG | 0 | 8 | SRFF_Q
OUTPUT_INSTANCE | 0 | cout | EX8_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_cout | 222 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_cout.Q | N_cout | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | cout | 234 | PO | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | cout | 0 | 6 | OI_OUT
OUTPUT_INSTANCE | 0 | outy<0> | EX8_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_outy<0>$Q | 226 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<0>.Q | N_outy<0> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | outy<0> | 235 | PO | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | outy<0> | 0 | 6 | OI_OUT
OUTPUT_INSTANCE | 0 | outy<1> | EX8_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_outy<1>$Q | 228 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<1>.Q | N_outy<1> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | outy<1> | 236 | PO | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | outy<1> | 0 | 6 | OI_OUT
OUTPUT_INSTANCE | 0 | outy<2> | EX8_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_outy<2>$Q | 230 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<2>.Q | N_outy<2> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | outy<2> | 237 | PO | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | outy<2> | 0 | 6 | OI_OUT
OUTPUT_INSTANCE | 0 | outy<3> | EX8_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_outy<3>$Q | 232 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | N_outy<3>.Q | N_outy<3> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | outy<3> | 238 | PO | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | outy<3> | 0 | 6 | OI_OUT
INPUT_INSTANCE | 0 | 0 | NULL | Pfbk_Created_outy<0> | EX8_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | outy<0> | 235 | PO | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | outy<0> | 0 | 6 | OI_OUT
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | outy<0>_PIN_BUF_ | 274 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | Pfbk_Created_outy<0> | 0 | 5 | II_IMUX
INPUT_INSTANCE | 0 | 0 | NULL | Pfbk_Created_outy<1> | EX8_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | outy<1> | 236 | PO | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | outy<1> | 0 | 6 | OI_OUT
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | outy<1>_PIN_BUF_ | 275 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | Pfbk_Created_outy<1> | 0 | 5 | II_IMUX
INPUT_INSTANCE | 0 | 0 | NULL | Pfbk_Created_outy<2> | EX8_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | outy<2> | 237 | PO | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | outy<2> | 0 | 6 | OI_OUT
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | outy<2>_PIN_BUF_ | 276 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | Pfbk_Created_outy<2> | 0 | 5 | II_IMUX
INPUT_INSTANCE | 0 | 0 | NULL | Pfbk_Created_outy<3> | EX8_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | outy<3> | 238 | PO | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | outy<3> | 0 | 6 | OI_OUT
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | outy<3>_PIN_BUF_ | 277 | ? | 0 | 0 | EX8_COPY_0_COPY_0 | NULL | NULL | Pfbk_Created_outy<3> | 0 | 5 | II_IMUX
FB_INSTANCE | FOOBAR1_ | EX8_COPY_0_COPY_0 | 0 | 0 | 0
FBPIN | 13 | NULL | 0 | N_rst | 0 | NULL | 0 | 20 | 49152
FBPIN | 16 | NULL | 0 | N_ena | 0 | NULL | 0 | 23 | 49152
FBPIN | 18 | NULL | 0 | N_clk | 0 | NULL | 0 | 24 | 49152
FB_INSTANCE | FOOBAR2_ | EX8_COPY_0_COPY_0 | 0 | 0 | 0
FBPIN | 1 | N_cout | 1 | NULL | 0 | cout | 1 | 63 | 49152
FB_INSTANCE | FOOBAR3_ | EX8_COPY_0_COPY_0 | 0 | 0 | 0
FB_INSTANCE | FOOBAR4_ | EX8_COPY_0_COPY_0 | 0 | 0 | 0
FBPIN | 4 | N_outy<1> | 1 | Pfbk_Created_outy<1> | 1 | outy<1> | 1 | 52 | 49152
FBPIN | 12 | N_outy<2> | 1 | Pfbk_Created_outy<2> | 1 | outy<2> | 1 | 58 | 49152
FBPIN | 13 | N_outy<3> | 1 | Pfbk_Created_outy<3> | 1 | outy<3> | 1 | 61 | 49152
FBPIN | 14 | N_outy<0> | 1 | Pfbk_Created_outy<0> | 1 | outy<0> | 1 | 56 | 49152
FB_INSTANCE | INPUTPINS_FOOBAR5_ | EX8_COPY_0_COPY_0 | 0 | 0 | 0
FB_ORDER_OF_INPUTS | FOOBAR2_ | 1 | outy<3> | 61 | 5 | outy<0> | 56 | 11 | outy<2> | 58 | 13 | outy<1> | 52
FB_IMUX_INDEX | FOOBAR2_ | -1 | 127 | -1 | -1 | -1 | 95 | -1 | -1 | -1 | -1 | -1 | 131 | -1 | 139 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1
FB_ORDER_OF_INPUTS | FOOBAR4_ | 3 | N_outy<1>.FBK | NULL | 6 | ena | 23 | 11 | N_outy<2>.FBK | NULL | 13 | N_outy<0>.FBK | NULL | 14 | clk | 24
FB_ORDER_OF_INPUTS | FOOBAR4_ | 16 | rst | 20
FB_IMUX_INDEX | FOOBAR4_ | -1 | -1 | -1 | 3 | -1 | -1 | 132 | -1 | -1 | -1 | -1 | 11 | -1 | 13 | 140 | -1 | 123 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1
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