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📄 ex6.vm6

📁 [VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][
💻 VM6
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12 
NDS Database:  version E.38

NDS_INFO | xc9500 | 957284 | XC9572-7-PC84

DEVICE | 9572 | 957284 | 

NETWORK | ex6 | 0 | 0 | 209731591

INPUT_INSTANCE | 0 | 0 | NULL | N_load | EX6_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | load | 537 | PI | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_load | 518 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_load | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_clk | EX6_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | clk | 538 | PI | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_clk | 519 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX

INPUT_INSTANCE | 0 | 0 | NULL | N_din<1> | EX6_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | din<1> | 545 | PI | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_din<1> | 533 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<1> | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PrldLow+OptxMapped+ClkInv | reg8<1> | EX6_COPY_0_COPY_0 | 2222982144 | 4 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_load | 518 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_load | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din<1> | 533 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 519 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | reg8<2>.FBK | 587 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<2>.Q | reg8<2> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | reg8<1> | 520 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<1>.Q | reg8<1> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | reg8<1>.FBK | 593 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<1>.Q | reg8<1> | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | reg8<1>.SI | reg8<1> | 0 | 4 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_load | 518 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_load | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din<1> | 533 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<1> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 519 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | reg8<2>.FBK | 587 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<2>.Q | reg8<2> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | reg8<1>.D1 | 548 | ? | 0 | 4096 | reg8<1> | NULL | NULL | reg8<1>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | reg8<1>.D2 | 549 | ? | 0 | 4096 | reg8<1> | NULL | NULL | reg8<1>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 2 | IV_TRUE | N_load | IV_TRUE | N_din<1>
SPPTERM | 2 | IV_FALSE | N_load | IV_TRUE | reg8<2>.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | reg8<1>.CLKF | 550 | ? | 0 | 4096 | reg8<1> | NULL | NULL | reg8<1>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk

SRFF_INSTANCE | reg8<1>.REG | reg8<1> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | reg8<1>.D | 547 | ? | 0 | 0 | reg8<1> | NULL | NULL | reg8<1>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | reg8<1>.CLKF | 550 | ? | 0 | 4096 | reg8<1> | NULL | NULL | reg8<1>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | reg8<1>.Q | 551 | ? | 0 | 0 | reg8<1> | NULL | NULL | reg8<1>.REG | 0 | 8 | SRFF_Q

INPUT_INSTANCE | 0 | 0 | NULL | N_din<2> | EX6_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | din<2> | 540 | PI | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_din<2> | 528 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<2> | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PrldLow+OptxMapped+ClkInv | reg8<2> | EX6_COPY_0_COPY_0 | 2222982144 | 4 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_load | 518 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_load | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din<2> | 528 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 519 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | reg8<3>.FBK | 588 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<3>.Q | reg8<3> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | reg8<2> | 521 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<2>.Q | reg8<2> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | reg8<2>.FBK | 587 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<2>.Q | reg8<2> | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | reg8<2>.SI | reg8<2> | 0 | 4 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_load | 518 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_load | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din<2> | 528 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<2> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 519 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | reg8<3>.FBK | 588 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<3>.Q | reg8<3> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | reg8<2>.D1 | 553 | ? | 0 | 4096 | reg8<2> | NULL | NULL | reg8<2>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | reg8<2>.D2 | 554 | ? | 0 | 4096 | reg8<2> | NULL | NULL | reg8<2>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 2 | IV_TRUE | N_load | IV_TRUE | N_din<2>
SPPTERM | 2 | IV_FALSE | N_load | IV_TRUE | reg8<3>.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | reg8<2>.CLKF | 555 | ? | 0 | 4096 | reg8<2> | NULL | NULL | reg8<2>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk

SRFF_INSTANCE | reg8<2>.REG | reg8<2> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | reg8<2>.D | 552 | ? | 0 | 0 | reg8<2> | NULL | NULL | reg8<2>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | reg8<2>.CLKF | 555 | ? | 0 | 4096 | reg8<2> | NULL | NULL | reg8<2>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | reg8<2>.Q | 556 | ? | 0 | 0 | reg8<2> | NULL | NULL | reg8<2>.REG | 0 | 8 | SRFF_Q

INPUT_INSTANCE | 0 | 0 | NULL | N_din<3> | EX6_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | din<3> | 543 | PI | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_din<3> | 531 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<3> | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PrldLow+OptxMapped+ClkInv | reg8<3> | EX6_COPY_0_COPY_0 | 2222982144 | 4 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_load | 518 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_load | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din<3> | 531 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 519 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | reg8<4>.FBK | 589 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<4>.Q | reg8<4> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | reg8<3> | 522 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<3>.Q | reg8<3> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | reg8<3>.FBK | 588 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<3>.Q | reg8<3> | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | reg8<3>.SI | reg8<3> | 0 | 4 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_load | 518 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_load | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din<3> | 531 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<3> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 519 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | reg8<4>.FBK | 589 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<4>.Q | reg8<4> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | reg8<3>.D1 | 558 | ? | 0 | 4096 | reg8<3> | NULL | NULL | reg8<3>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | reg8<3>.D2 | 559 | ? | 0 | 4096 | reg8<3> | NULL | NULL | reg8<3>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 2 | IV_TRUE | N_load | IV_TRUE | N_din<3>
SPPTERM | 2 | IV_FALSE | N_load | IV_TRUE | reg8<4>.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | reg8<3>.CLKF | 560 | ? | 0 | 4096 | reg8<3> | NULL | NULL | reg8<3>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk

SRFF_INSTANCE | reg8<3>.REG | reg8<3> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | reg8<3>.D | 557 | ? | 0 | 0 | reg8<3> | NULL | NULL | reg8<3>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | reg8<3>.CLKF | 560 | ? | 0 | 4096 | reg8<3> | NULL | NULL | reg8<3>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | reg8<3>.Q | 561 | ? | 0 | 0 | reg8<3> | NULL | NULL | reg8<3>.REG | 0 | 8 | SRFF_Q

INPUT_INSTANCE | 0 | 0 | NULL | N_din<4> | EX6_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | din<4> | 539 | PI | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_din<4> | 527 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<4> | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PrldLow+OptxMapped+ClkInv | reg8<4> | EX6_COPY_0_COPY_0 | 2222982144 | 4 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_load | 518 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_load | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din<4> | 527 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<4> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 519 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | reg8<5>.FBK | 590 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<5>.Q | reg8<5> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | reg8<4> | 523 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<4>.Q | reg8<4> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | reg8<4>.FBK | 589 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<4>.Q | reg8<4> | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | reg8<4>.SI | reg8<4> | 0 | 4 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_load | 518 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_load | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din<4> | 527 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<4> | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 519 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | reg8<5>.FBK | 590 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | reg8<5>.Q | reg8<5> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | reg8<4>.D1 | 563 | ? | 0 | 4096 | reg8<4> | NULL | NULL | reg8<4>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | reg8<4>.D2 | 564 | ? | 0 | 4096 | reg8<4> | NULL | NULL | reg8<4>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 2 | IV_TRUE | N_load | IV_TRUE | N_din<4>
SPPTERM | 2 | IV_FALSE | N_load | IV_TRUE | reg8<5>.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | reg8<4>.CLKF | 565 | ? | 0 | 4096 | reg8<4> | NULL | NULL | reg8<4>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk

SRFF_INSTANCE | reg8<4>.REG | reg8<4> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | reg8<4>.D | 562 | ? | 0 | 0 | reg8<4> | NULL | NULL | reg8<4>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | reg8<4>.CLKF | 565 | ? | 0 | 4096 | reg8<4> | NULL | NULL | reg8<4>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | reg8<4>.Q | 566 | ? | 0 | 0 | reg8<4> | NULL | NULL | reg8<4>.REG | 0 | 8 | SRFF_Q

INPUT_INSTANCE | 0 | 0 | NULL | N_din<5> | EX6_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | din<5> | 546 | PI | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | N_din<5> | 534 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<5> | 0 | 5 | II_IMUX

MACROCELL_INSTANCE | PrldLow+OptxMapped+ClkInv | reg8<5> | EX6_COPY_0_COPY_0 | 2222982144 | 4 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_load | 518 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_load | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_din<5> | 534 | ? | 0 | 0 | EX6_COPY_0_COPY_0 | NULL | NULL | N_din<5> | 0 | 5 | II_IMUX
12

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