time_sim.edn

[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][

            )
            (instance reg8_7__D2_PT_1_63
              (viewRef view_1 (cellRef x_and2 (libraryRef SIMPRIMS)))
              (portInstance IN0
                (property RISE (integer 2000) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 2000) (unit TIME) (owner "Xilinx"))
              )
              (portInstance IN1
                (property RISE (integer 6000) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 6000) (unit TIME) (owner "Xilinx"))
              )
            )
            (instance reg8_7__D2_64
              (viewRef view_1 (cellRef x_or2 (libraryRef SIMPRIMS)))
            )
            (instance reg8_7__XOR
              (viewRef view_1 (cellRef x_xor2 (libraryRef SIMPRIMS)))
            )
            (instance din_7__PAD
              (viewRef view_1 (cellRef x_ipad (libraryRef SIMPRIMS)))
            )
            (instance (rename N_din_7___65 "N_din_7_&_65")
              (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS)))
              (portInstance OUT
                (property RISE (integer 2500) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 2500) (unit TIME) (owner "Xilinx"))
              )
            )
            (instance clk_PAD
              (viewRef view_1 (cellRef x_ipad (libraryRef SIMPRIMS)))
            )
            (instance N_clk_66
              (viewRef view_1 (cellRef x_buf (libraryRef SIMPRIMS)))
              (portInstance OUT
                (property RISE (integer 2500) (unit TIME) (owner "Xilinx"))
                (property FALL (integer 2500) (unit TIME) (owner "Xilinx"))
              )
            )
            (instance NlwInverterBlock_N_sout_D2_PT_1_IN0
              (viewRef view_1 (cellRef x_inv (libraryRef SIMPRIMS)))
            )
            (instance NlwInverterBlock_reg8_1__D2_PT_1_IN0
              (viewRef view_1 (cellRef x_inv (libraryRef SIMPRIMS)))
            )
            (instance NlwInverterBlock_reg8_2__D2_PT_1_IN0
              (viewRef view_1 (cellRef x_inv (libraryRef SIMPRIMS)))
            )
            (instance NlwInverterBlock_reg8_3__D2_PT_1_IN0
              (viewRef view_1 (cellRef x_inv (libraryRef SIMPRIMS)))
            )
            (instance NlwInverterBlock_reg8_4__D2_PT_1_IN0
              (viewRef view_1 (cellRef x_inv (libraryRef SIMPRIMS)))
            )
            (instance NlwInverterBlock_reg8_5__D2_PT_1_IN0
              (viewRef view_1 (cellRef x_inv (libraryRef SIMPRIMS)))
            )
            (instance NlwInverterBlock_reg8_6__D2_PT_1_IN0
              (viewRef view_1 (cellRef x_inv (libraryRef SIMPRIMS)))
            )
            (instance NlwInverterBlock_reg8_7__D2_PT_1_IN0
              (viewRef view_1 (cellRef x_inv (libraryRef SIMPRIMS)))
            )
            (net load
              (joined
                (portRef load)
                (portRef PAD (instanceRef load_PAD))
                (portRef IN (instanceRef N_load_8))
              )
            )
            (net clk
              (joined
                (portRef clk)
                (portRef PAD (instanceRef clk_PAD))
                (portRef IN (instanceRef N_clk_66))
              )
            )
            (net (rename din_1__ "din<1>")
              (joined
                (portRef din_1__)
                (portRef PAD (instanceRef din_1__PAD))
                (portRef IN (instanceRef N_din_1___17))
              )
            )
            (net (rename din_7__ "din<7>")
              (joined
                (portRef din_7__)
                (portRef PAD (instanceRef din_7__PAD))
                (portRef IN (instanceRef N_din_7___65))
              )
            )
            (net (rename din_2__ "din<2>")
              (joined
                (portRef din_2__)
                (portRef PAD (instanceRef din_2__PAD))
                (portRef IN (instanceRef N_din_2___25))
              )
            )
            (net (rename din_3__ "din<3>")
              (joined
                (portRef din_3__)
                (portRef PAD (instanceRef din_3__PAD))
                (portRef IN (instanceRef N_din_3___33))
              )
            )
            (net sout
              (joined
                (portRef sout)
                (portRef PAD (instanceRef sout_PAD))
                (portRef OUT (instanceRef sout_0))
              )
            )
            (net (rename din_4__ "din<4>")
              (joined
                (portRef din_4__)
                (portRef PAD (instanceRef din_4__PAD))
                (portRef IN (instanceRef N_din_4___41))
              )
            )
            (net (rename din_0__ "din<0>")
              (joined
                (portRef din_0__)
                (portRef PAD (instanceRef din_0__PAD))
                (portRef IN (instanceRef N_din_0___9))
              )
            )
            (net (rename din_5__ "din<5>")
              (joined
                (portRef din_5__)
                (portRef PAD (instanceRef din_5__PAD))
                (portRef IN (instanceRef N_din_5___49))
              )
            )
            (net (rename din_6__ "din<6>")
              (joined
                (portRef din_6__)
                (portRef PAD (instanceRef din_6__PAD))
                (portRef IN (instanceRef N_din_6___57))
              )
            )
            (net N_sout
              (joined
                (portRef IN (instanceRef sout_0))
                (portRef OUT (instanceRef N_sout_1))
              )
            )
            (net N_sout_Q
              (joined
                (portRef IN (instanceRef N_sout_1))
                (portRef OUT (instanceRef N_sout_REG))
              )
            )
            (net N_sout_D
              (joined
                (portRef IN (instanceRef N_sout_REG))
                (portRef OUT (instanceRef N_sout_XOR))
              )
            )
            (net N_sout_CLKF
              (joined
                (portRef CLK (instanceRef N_sout_REG))
                (portRef OUT (instanceRef N_sout_CLKF_3))
              )
            )
            (net N_clk
              (joined
                (portRef IN0 (instanceRef N_sout_CLKF_PT_0_2))
                (portRef IN1 (instanceRef N_sout_CLKF_PT_0_2))
                (portRef IN0 (instanceRef reg8_1__CLKF_PT_0_11))
                (portRef IN1 (instanceRef reg8_1__CLKF_PT_0_11))
                (portRef IN0 (instanceRef reg8_2__CLKF_PT_0_19))
                (portRef IN1 (instanceRef reg8_2__CLKF_PT_0_19))
                (portRef IN0 (instanceRef reg8_3__CLKF_PT_0_27))
                (portRef IN1 (instanceRef reg8_3__CLKF_PT_0_27))
                (portRef IN0 (instanceRef reg8_4__CLKF_PT_0_35))
                (portRef IN1 (instanceRef reg8_4__CLKF_PT_0_35))
                (portRef IN0 (instanceRef reg8_5__CLKF_PT_0_43))
                (portRef IN1 (instanceRef reg8_5__CLKF_PT_0_43))
                (portRef IN0 (instanceRef reg8_6__CLKF_PT_0_51))
                (portRef IN1 (instanceRef reg8_6__CLKF_PT_0_51))
                (portRef IN0 (instanceRef reg8_7__CLKF_PT_0_59))
                (portRef IN1 (instanceRef reg8_7__CLKF_PT_0_59))
                (portRef OUT (instanceRef N_clk_66))
              )
            )
            (net N_sout_CLKF_PT_0
              (joined
                (portRef OUT (instanceRef N_sout_CLKF_PT_0_2))
                (portRef IN0 (instanceRef N_sout_CLKF_3))
                (portRef IN1 (instanceRef N_sout_CLKF_3))
              )
            )
            (net N_sout_D1
              (joined
                (portRef OUT (instanceRef N_sout_D1_4))
                (portRef IN0 (instanceRef N_sout_XOR))
              )
            )
            (net N_load
              (joined
                (portRef IN0 (instanceRef N_sout_D2_PT_0_5))
                (portRef OUT (instanceRef N_load_8))
                (portRef IN0 (instanceRef reg8_1__D2_PT_0_14))
                (portRef IN0 (instanceRef reg8_2__D2_PT_0_22))
                (portRef IN0 (instanceRef reg8_3__D2_PT_0_30))
                (portRef IN0 (instanceRef reg8_4__D2_PT_0_38))
                (portRef IN0 (instanceRef reg8_5__D2_PT_0_46))
                (portRef IN0 (instanceRef reg8_6__D2_PT_0_54))
                (portRef IN0 (instanceRef reg8_7__D2_PT_0_62))
                (portRef IN (instanceRef NlwInverterBlock_N_sout_D2_PT_1_IN0))
                (portRef IN (instanceRef NlwInverterBlock_reg8_1__D2_PT_1_IN0))
                (portRef IN (instanceRef NlwInverterBlock_reg8_2__D2_PT_1_IN0))
                (portRef IN (instanceRef NlwInverterBlock_reg8_3__D2_PT_1_IN0))
                (portRef IN (instanceRef NlwInverterBlock_reg8_4__D2_PT_1_IN0))
                (portRef IN (instanceRef NlwInverterBlock_reg8_5__D2_PT_1_IN0))
                (portRef IN (instanceRef NlwInverterBlock_reg8_6__D2_PT_1_IN0))
                (portRef IN (instanceRef NlwInverterBlock_reg8_7__D2_PT_1_IN0))
              )
            )
            (net (rename N_din_0__ "N_din<0>")
              (joined
                (portRef IN1 (instanceRef N_sout_D2_PT_0_5))
                (portRef OUT (instanceRef N_din_0___9))
              )
            )
            (net N_sout_D2_PT_0
              (joined
                (portRef OUT (instanceRef N_sout_D2_PT_0_5))
                (portRef IN0 (instanceRef N_sout_D2_7))
              )
            )
            (net reg8_1__FBK
              (joined
                (portRef IN1 (instanceRef N_sout_D2_PT_1_6))
                (portRef OUT (instanceRef reg8_1__FBK_10))
              )
            )
            (net N_sout_D2_PT_1
              (joined
                (portRef OUT (instanceRef N_sout_D2_PT_1_6))
                (portRef IN1 (instanceRef N_sout_D2_7))
              )
            )
            (net N_sout_D2
              (joined
                (portRef OUT (instanceRef N_sout_D2_7))
                (portRef IN1 (instanceRef N_sout_XOR))
              )
            )
            (net reg8_1__Q
              (joined
                (portRef IN (instanceRef reg8_1__FBK_10))
                (portRef OUT (instanceRef reg8_1__REG))
              )
            )
            (net reg8_1__D
              (joined
                (portRef IN (instanceRef reg8_1__REG))
                (portRef OUT (instanceRef reg8_1__XOR))
              )
            )
            (net reg8_1__CLKF
              (joined
                (portRef CLK (instanceRef reg8_1__REG))
                (portRef OUT (instanceRef reg8_1__CLKF_12))
              )
            )
            (net reg8_1__CLKF_PT_0
              (joined
                (portRef OUT (instanceRef reg8_1__CLKF_PT_0_11))
                (portRef IN0 (instanceRef reg8_1__CLKF_12))
                (portRef IN1 (instanceRef reg8_1__CLKF_12))
              )
            )
            (net reg8_1__D1
              (joined
                (portRef OUT (instanceRef reg8_1__D1_13))
                (portRef IN0 (instanceRef reg8_1__XOR))
              )
            )
            (net (rename N_din_1__ "N_din<1>")
              (joined
                (portRef IN1 (instanceRef reg8_1__D2_PT_0_14))
                (portRef OUT (instanceRef N_din_1___17))
              )
            )
            (net reg8_1__D2_PT_0
              (joined
                (portRef OUT (instanceRef reg8_1__D2_PT_0_14))
                (portRef IN0 (instanceRef reg8_1__D2_16))
              )
            )
            (net reg8_2__FBK
              (joined
                (portRef IN1 (instanceRef reg8_1__D2_PT_1_15))
                (portRef OUT (instanceRef reg8_2__FBK_18))
              )
            )
            (net reg8_1__D2_PT_1
              (joined
                (portRef OUT (instanceRef reg8_1__D2_PT_1_15))
                (portRef IN1 (instanceRef reg8_1__D2_16))
              )
            )
            (net reg8_1__D2
              (joined
                (portRef OUT (instanceRef reg8_1__D2_16))
                (portRef IN1 (instanceRef reg8_1__XOR))
              )
            )
            (net reg8_2__Q
              (joined
                (portRef IN (instanceRef reg8_2__FBK_18))
                (portRef OUT (instanceRef reg8_2__REG))
              )
            )
            (net reg8_2__D
              (joined
                (portRef IN (instanceRef reg8_2__REG))
                (portRef OUT (instanceRef reg8_2__XOR))
              )
            )
            (net reg8_2__CLKF
              (joined
                (portRef CLK (instanceRef reg8_2__REG))
                (portRef OUT (instanceRef reg8_2__CLKF_20))
              )
            )
            (net reg8_2__CLKF_PT_0
              (joined
                (portRef OUT (instanceRef reg8_2__CLKF_PT_0_19))
                (portRef IN0 (instanceRef reg8_2__CLKF_20))
                (portRef IN1 (instanceRef reg8_2__CLKF_20))
              )
            )
            (net reg8_2__D1
              (joined
                (portRef OUT (instanceRef reg8_2__D1_21))
                (portRef IN0 (instanceRef reg8_2__XOR))
              )
            )
            (net (rename N_din_2__ "N_din<2>")
              (joined
                (portRef IN1 (instanceRef reg8_2__D2_PT_0_22))
                (portRef OUT (instanceRef N_din_2___25))
              )
            )
            (net reg8_2__D2_PT_0
              (joined
                (portRef OUT (instanceRef reg8_2__D2_PT_0_22))
                (portRef IN0 (instanceRef reg8_2__D2_24))
              )
            )
            (net reg8_3__FBK
              (joined
                (portRef IN1 (instanceRef reg8_2__D2_PT_1_23))
                (portRef OUT (instanceRef reg8_3__FBK_26))
              )
            )
            (net reg8_2__D2_PT_1
              (joined
                (portRef OUT (instanceRef reg8_2__D2_PT_1_23))
                (portRef IN1 (instanceRef reg8_2__D2_24))
              )
            )
            (net reg8_2__D2
              (joined
                (portRef OUT (instanceRef reg8_2__D2_24))
                (portRef IN1 (instanceRef reg8_2__XOR))
              )
            )
            (net reg8_3__Q
              (joined
                (portRef IN (instanceRef reg8_3__FBK_26))
                (portRef OUT (instanceRef reg8_3__REG))
              )
            )
            (net reg8_3__D
              (joined
                (portRef IN (instanceRef reg8_3__REG))
                (portRef OUT (instanceRef reg8_3__XOR))
              )
            )
            (net reg8_3__CLKF
              (joined
                (portRef CLK (instanceRef reg8_3__REG))
                (portRef OUT (instanceRef reg8_3__CLKF_28))
              )
            )
            (net reg8_3__CLKF_PT_0
              (joined
                (portRef OUT (instanceRef reg8_3__CLKF_PT_0_27))
                (portRef IN0 (instanceRef reg8_3__CLKF_28))
                (portRef IN1 (instanceRef reg8_3__CLKF_28))