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📄 ex24.out

📁 [VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][
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Reading in the Synopsys vhdl primitives.

Inferred memory devices in process 
	in routine EX24 line 49 in file
         'D:/temp/eda6000/xc95/ex24/ex24.vhd'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|  current_state_reg  | Flip-flop |   5   |  N  | N  | ?  | ?  | ?  | ?  | ?  |
===============================================================================

current_state_reg<2>
--------------------
    Async-reset: rst


current_state_reg<4>
--------------------
    Async-reset: rst


current_state_reg<0>
--------------------
    Async-set: rst


current_state_reg<1>
--------------------
    Async-reset: rst


current_state_reg<3>
--------------------
    Async-reset: rst



Inferred THREE-STATE control devices in process 
	in routine EX24 line 105 in
         file 'D:/temp/eda6000/xc95/ex24/ex24.vhd'.
============================================================================
|     Three-state Device Name      |               Type               | MB |
============================================================================
|           mem_d_tri<3>           |        Three-state Buffer        | N  |
|           mem_d_tri<7>           |        Three-state Buffer        | N  |
|           mem_d_tri<5>           |        Three-state Buffer        | N  |
|           mem_d_tri<1>           |        Three-state Buffer        | N  |
|           mem_d_tri<0>           |        Three-state Buffer        | N  |
|           mem_d_tri<4>           |        Three-state Buffer        | N  |
|           mem_d_tri<6>           |        Three-state Buffer        | N  |
|           mem_d_tri<2>           |        Three-state Buffer        | N  |
============================================================================


Inferred memory devices in process 
	in routine EX24 line 108 in file
         'D:/temp/eda6000/xc95/ex24/ex24.vhd'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|     address_reg     | Flip-flop |  15   |  Y  | N  | Y  | N  | N  | N  | N  |
===============================================================================

address_reg (width 15)
----------------------
    Async-reset: rst



Inferred memory devices in process 
	in routine EX24 line 119 in file
         'D:/temp/eda6000/xc95/ex24/ex24.vhd'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|    overflow_reg     | Flip-flop |   1   |  -  | -  | Y  | N  | N  | Y  | N  |
===============================================================================

overflow_reg
------------
    Async-reset: rst
    Sync-set: true



Inferred memory devices in process 
	in routine EX24 line 129 in file
         'D:/temp/eda6000/xc95/ex24/ex24.vhd'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|    saddress_reg     | Flip-flop |  15   |  Y  | N  | N  | N  | N  | N  | N  |
===============================================================================

saddress_reg (width 15)
-----------------------
    set/reset/toggle: none



Inferred memory devices in process 
	in routine EX24 line 138 in file
         'D:/temp/eda6000/xc95/ex24/ex24.vhd'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|      datao_reg      | Flip-flop |   1   |  -  | -  | N  | N  | N  | N  | N  |
|      sbuf_reg       | Flip-flop |   7   |  N  | N  | ?  | ?  | ?  | ?  | ?  |
===============================================================================

datao_reg
---------
    set/reset/toggle: none


sbuf_reg<2>
-----------
    set/reset/toggle: none


sbuf_reg<6>
-----------
    set/reset/toggle: none


sbuf_reg<4>
-----------
    set/reset/toggle: none


sbuf_reg<0>
-----------
    set/reset/toggle: none


sbuf_reg<1>
-----------
    set/reset/toggle: none


sbuf_reg<5>
-----------
    set/reset/toggle: none


sbuf_reg<3>
-----------
    set/reset/toggle: none


Writing to hnl file 'd:\temp\EDA6000\XC95\EX24\ex24/workdirs/WORK/EX24.hnl'

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