ex24.gyd

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· GYD 代码 · 共 75 行

Pin Freeze File:  version E.38

957284 XC9572-7-PC84
clk S:PIN10
clki S:PIN84
clko S:PIN83
datai S:PIN82
din<0> S:PIN36
din<1> S:PIN33
din<2> S:PIN35
din<3> S:PIN37
din<4> S:PIN40
din<5> S:PIN39
din<6> S:PIN41
din<7> S:PIN43
eoc S:PIN18
load S:PIN2
rst S:PIN4
mem_a<13> S:PIN62
mem_a<12> S:PIN63
mem_a<11> S:PIN61
mem_a<10> S:PIN58
mem_a<9> S:PIN52
mem_a<8> S:PIN56
mem_a<7> S:PIN57
mem_a<6> S:PIN55
mem_a<14> S:PIN65
mem_a<5> S:PIN53
mem_a<4> S:PIN51
mem_a<3> S:PIN48
mem_a<2> S:PIN47
mem_a<1> S:PIN46
mem_a<0> S:PIN45
mem_wr S:PIN79
mem_rd S:PIN80
oe S:PIN15
clock S:PIN21
datao S:PIN81
mem_d<0> S:PIN66
mem_d<1> S:PIN69
mem_d<2> S:PIN68
mem_d<3> S:PIN71
mem_d<4> S:PIN70
mem_d<5> S:PIN72
mem_d<6> S:PIN76
mem_d<7> S:PIN77
mem_f S:PIN3
start S:PIN19


;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.

PARTITION FB1_1 "saddress<5>" "saddress<4>" "saddress<1>" "saddress<14>"
		 "saddress<13>" N_mem_f "saddress<12>" "saddress<11>"
		 "saddress<10>" "saddress<0>" "sbuf<6>" "sbuf<5>"
		 "sbuf<4>" "sbuf<3>" "sbuf<2>" "sbuf<1>"
		 N9 "sbuf<0>"
PARTITION FB2_1 "C6/N18" "N_din<1>$BUF0" "saddress<9>" "N_din<2>$BUF0"
		 "N_din<4>$BUF0" "N_din<3>$BUF0" "N_din<6>$BUF0" "N_din<5>$BUF0"
		 "saddress<8>" "address<9>" "N_din<7>$BUF0" "C8/N6"
		 N675 N_datao "address<8>" "address<14>"
		 "address<13>" "address<10>"
PARTITION FB3_1 "saddress<7>" "saddress<6>" "N_din<7>$BUF0/N_din<7>$BUF0_TRST" "current_state<4>"
		 "current_state<1>" "current_state<3>" "current_state<2>" "N_clk$BUF0"
		 "current_state<0>" "address<7>" "address<6>" "address<5>"
		 "address<4>" "address<3>" "address<2>" "C6/N90"
		 "address<1>" "address<0>"
PARTITION FB4_1 "C6/N84" "saddress<3>" "C6/N66" "C6/N36"
		 "C6/N78" "saddress<2>" "C6/N54" "C6/N72"
		 "address<12>" "C6/N48" "C6/N60" "C6/N30"
		 "C6/N24" "C6/N42" "C6/N6" "C6/N12"
		 "N_din<0>$BUF0" "address<11>"