ex24.mfd

[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][

    "saddress<13>"  :=  "saddress<12>.FBK".LFBK
    "saddress<13>".CLKF  =  clki
    "saddress<13>".PRLD  =  GND

MACROCELL | 2 | 4 | saddress<1>
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 2 | 5 | 2 | 2 | 3
INPUTS | 2 | clki  | saddress<0>.FBK".LFBK
INPUTMC | 1 | 2 | 12
INPUTP | 1 | 16
EQ | 3 | 
    "saddress<1>"  :=  "saddress<0>.FBK".LFBK
    "saddress<1>".CLKF  =  clki
    "saddress<1>".PRLD  =  GND

MACROCELL | 2 | 3 | saddress<2>
ATTRIBUTES | 8520480 | 0
OUTPUTMC | 2 | 0 | 17 | 5 | 4
INPUTS | 2 | clki  | saddress<1>.FBK".LFBK
INPUTMC | 1 | 2 | 4
INPUTP | 1 | 16
EQ | 3 | 
    "saddress<2>"  :=  "saddress<1>.FBK".LFBK
    "saddress<2>".CLKF  =  clki
    "saddress<2>".PRLD  =  GND

MACROCELL | 0 | 17 | saddress<3>
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 2 | 5 | 5 | 0 | 16
INPUTS | 2 | saddress<2>  | clki
INPUTMC | 1 | 2 | 3
INPUTP | 1 | 16
EQ | 3 | 
    "saddress<3>"  :=  "saddress<2>"
    "saddress<3>".CLKF  =  clki
    "saddress<3>".PRLD  =  GND

MACROCELL | 0 | 16 | saddress<4>
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 2 | 5 | 8 | 0 | 15
INPUTS | 2 | clki  | saddress<3>.FBK".LFBK
INPUTMC | 1 | 0 | 17
INPUTP | 1 | 16
EQ | 3 | 
    "saddress<4>"  :=  "saddress<3>.FBK".LFBK
    "saddress<4>".CLKF  =  clki
    "saddress<4>".PRLD  =  GND

MACROCELL | 0 | 15 | saddress<5>
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 2 | 5 | 11 | 0 | 14
INPUTS | 2 | clki  | saddress<4>.FBK".LFBK
INPUTMC | 1 | 0 | 16
INPUTP | 1 | 16
EQ | 3 | 
    "saddress<5>"  :=  "saddress<4>.FBK".LFBK
    "saddress<5>".CLKF  =  clki
    "saddress<5>".PRLD  =  GND

MACROCELL | 0 | 14 | saddress<6>
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 2 | 5 | 14 | 0 | 13
INPUTS | 2 | clki  | saddress<5>.FBK".LFBK
INPUTMC | 1 | 0 | 15
INPUTP | 1 | 16
EQ | 3 | 
    "saddress<6>"  :=  "saddress<5>.FBK".LFBK
    "saddress<6>".CLKF  =  clki
    "saddress<6>".PRLD  =  GND

MACROCELL | 0 | 13 | saddress<7>
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 2 | 3 | 1 | 0 | 12
INPUTS | 2 | clki  | saddress<6>.FBK".LFBK
INPUTMC | 1 | 0 | 14
INPUTP | 1 | 16
EQ | 3 | 
    "saddress<7>"  :=  "saddress<6>.FBK".LFBK
    "saddress<7>".CLKF  =  clki
    "saddress<7>".PRLD  =  GND

MACROCELL | 0 | 12 | saddress<8>
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 2 | 5 | 16 | 0 | 11
INPUTS | 2 | clki  | saddress<7>.FBK".LFBK
INPUTMC | 1 | 0 | 13
INPUTP | 1 | 16
EQ | 3 | 
    "saddress<8>"  :=  "saddress<7>.FBK".LFBK
    "saddress<8>".CLKF  =  clki
    "saddress<8>".PRLD  =  GND

MACROCELL | 0 | 11 | saddress<9>
ATTRIBUTES | 8520480 | 0
OUTPUTMC | 2 | 2 | 11 | 5 | 10
INPUTS | 2 | clki  | saddress<8>.FBK".LFBK
INPUTMC | 1 | 0 | 12
INPUTP | 1 | 16
EQ | 3 | 
    "saddress<9>"  :=  "saddress<8>.FBK".LFBK
    "saddress<9>".CLKF  =  clki
    "saddress<9>".PRLD  =  GND

MACROCELL | 2 | 5 | saddress<14>
ATTRIBUTES | 8520480 | 0
OUTPUTMC | 1 | 3 | 8
INPUTS | 2 | clki  | saddress<13>.FBK".LFBK
INPUTMC | 1 | 2 | 6
INPUTP | 1 | 16
EQ | 3 | 
    "saddress<14>"  :=  "saddress<13>.FBK".LFBK
    "saddress<14>".CLKF  =  clki
    "saddress<14>".PRLD  =  GND

MACROCELL | 1 | 6 | sbuf<0>
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 2 | 1 | 6 | 1 | 5
INPUTS | 4 | load  | mem_d<0>".PIN  | clko  | sbuf<0>.FBK".LFBK
INPUTMC | 1 | 1 | 6
INPUTP | 3 | 19 | 121 | 15
EQ | 4 | 
    "sbuf<0>"  :=  load * "mem_d<0>".PIN
	+ /load * "sbuf<0>.FBK".LFBK
    "sbuf<0>".CLKF  =  clko
    "sbuf<0>".PRLD  =  GND

MACROCELL | 1 | 5 | sbuf<1>
ATTRIBUTES | 8520480 | 0
OUTPUTMC | 1 | 2 | 17
INPUTS | 4 | load  | mem_d<1>".PIN  | clko  | sbuf<0>.FBK".LFBK
INPUTMC | 1 | 1 | 6
INPUTP | 3 | 19 | 126 | 15
EQ | 4 | 
    "sbuf<1>"  :=  load * "mem_d<1>".PIN
	+ /load * "sbuf<0>.FBK".LFBK
    "sbuf<1>".CLKF  =  clko
    "sbuf<1>".PRLD  =  GND

MACROCELL | 2 | 17 | sbuf<2>
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 1 | 2 | 16
INPUTS | 4 | load  | sbuf<1>  | mem_d<2>".PIN  | clko
INPUTMC | 1 | 1 | 5
INPUTP | 3 | 19 | 124 | 15
EQ | 4 | 
    "sbuf<2>"  :=  load * "mem_d<2>".PIN
	+ /load * "sbuf<1>"
    "sbuf<2>".CLKF  =  clko
    "sbuf<2>".PRLD  =  GND

MACROCELL | 2 | 16 | sbuf<3>
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 1 | 2 | 15
INPUTS | 4 | load  | mem_d<3>".PIN  | clko  | sbuf<2>.FBK".LFBK
INPUTMC | 1 | 2 | 17
INPUTP | 3 | 19 | 129 | 15
EQ | 4 | 
    "sbuf<3>"  :=  load * "mem_d<3>".PIN
	+ /load * "sbuf<2>.FBK".LFBK
    "sbuf<3>".CLKF  =  clko
    "sbuf<3>".PRLD  =  GND

MACROCELL | 2 | 15 | sbuf<4>
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 1 | 2 | 14
INPUTS | 4 | load  | mem_d<4>".PIN  | clko  | sbuf<3>.FBK".LFBK
INPUTMC | 1 | 2 | 16
INPUTP | 3 | 19 | 127 | 15
EQ | 4 | 
    "sbuf<4>"  :=  load * "mem_d<4>".PIN
	+ /load * "sbuf<3>.FBK".LFBK
    "sbuf<4>".CLKF  =  clko
    "sbuf<4>".PRLD  =  GND

MACROCELL | 2 | 14 | sbuf<5>
ATTRIBUTES | 8586016 | 0
OUTPUTMC | 1 | 2 | 13
INPUTS | 4 | load  | mem_d<5>".PIN  | clko  | sbuf<4>.FBK".LFBK
INPUTMC | 1 | 2 | 15
INPUTP | 3 | 19 | 131 | 15
EQ | 4 | 
    "sbuf<5>"  :=  load * "mem_d<5>".PIN
	+ /load * "sbuf<4>.FBK".LFBK
    "sbuf<5>".CLKF  =  clko
    "sbuf<5>".PRLD  =  GND

MACROCELL | 2 | 13 | sbuf<6>
ATTRIBUTES | 8520480 | 0
OUTPUTMC | 1 | 1 | 13
INPUTS | 4 | load  | mem_d<6>".PIN  | clko  | sbuf<5>.FBK".LFBK
INPUTMC | 1 | 2 | 14
INPUTP | 3 | 19 | 4 | 15
EQ | 4 | 
    "sbuf<6>"  :=  load * "mem_d<6>".PIN
	+ /load * "sbuf<5>.FBK".LFBK
    "sbuf<6>".CLKF  =  clko
    "sbuf<6>".PRLD  =  GND

MACROCELL | 1 | 13 | N_datao
ATTRIBUTES | 8782626 | 0
INPUTS | 4 | load  | sbuf<6>  | mem_d<7>".PIN  | clko
INPUTMC | 1 | 2 | 13
INPUTP | 3 | 19 | 5 | 15
EQ | 4 | 
    datao  :=  load * "mem_d<7>".PIN
	+ /load * "sbuf<6>"
    datao.CLKF  =  clko
    datao.PRLD  =  GND

MACROCELL | 3 | 5 | C6/N12
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | address<13>  | saddress<13>
INPUTMC | 2 | 5 | 12 | 2 | 6
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<13>"  =  rst * "saddress<13>"
	+ /rst * "address<13>"

MACROCELL | 3 | 7 | C6/N18
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | address<12>  | saddress<12>
INPUTMC | 2 | 5 | 13 | 2 | 8
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<12>"  =  rst * "saddress<12>"
	+ /rst * "address<12>"

MACROCELL | 3 | 4 | C6/N24
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | address<11>  | saddress<11>
INPUTMC | 2 | 5 | 15 | 2 | 9
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<11>"  =  rst * "saddress<11>"
	+ /rst * "address<11>"

MACROCELL | 3 | 2 | C6/N30
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | address<10>  | saddress<10>
INPUTMC | 2 | 5 | 17 | 2 | 11
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<10>"  =  rst * "saddress<10>"
	+ /rst * "address<10>"

MACROCELL | 5 | 10 | C6/N36
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | saddress<9>  | address<9>.FBK".LFBK
INPUTMC | 2 | 0 | 11 | 5 | 6
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<9>"  =  rst * "saddress<9>"
	+ /rst * "address<9>.FBK".LFBK

MACROCELL | 5 | 16 | C6/N42
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | saddress<8>  | address<8>.FBK".LFBK
INPUTMC | 2 | 0 | 12 | 5 | 7
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<8>"  =  rst * "saddress<8>"
	+ /rst * "address<8>.FBK".LFBK

MACROCELL | 3 | 1 | C6/N48
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | saddress<7>  | address<7>.FBK".LFBK
INPUTMC | 2 | 0 | 13 | 3 | 6
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<7>"  =  rst * "saddress<7>"
	+ /rst * "address<7>.FBK".LFBK

MACROCELL | 5 | 14 | C6/N54
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | address<6>  | saddress<6>
INPUTMC | 2 | 3 | 9 | 0 | 14
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<6>"  =  rst * "saddress<6>"
	+ /rst * "address<6>"

MACROCELL | 3 | 8 | C6/N6
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | address<14>  | saddress<14>
INPUTMC | 2 | 5 | 9 | 2 | 5
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<14>"  =  rst * "saddress<14>"
	+ /rst * "address<14>"

MACROCELL | 5 | 11 | C6/N60
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | address<5>  | saddress<5>
INPUTMC | 2 | 3 | 11 | 0 | 15
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<5>"  =  rst * "saddress<5>"
	+ /rst * "address<5>"

MACROCELL | 5 | 8 | C6/N66
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | address<4>  | saddress<4>
INPUTMC | 2 | 3 | 12 | 0 | 16
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<4>"  =  rst * "saddress<4>"
	+ /rst * "address<4>"

MACROCELL | 5 | 5 | C6/N72
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | address<3>  | saddress<3>
INPUTMC | 2 | 3 | 15 | 0 | 17
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<3>"  =  rst * "saddress<3>"
	+ /rst * "address<3>"

MACROCELL | 5 | 4 | C6/N78
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | address<2>  | saddress<2>
INPUTMC | 2 | 3 | 17 | 2 | 3
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<2>"  =  rst * "saddress<2>"
	+ /rst * "address<2>"

MACROCELL | 5 | 2 | C6/N84
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | saddress<1>  | address<1>
INPUTMC | 2 | 2 | 4 | 1 | 16
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<1>"  =  rst * "saddress<1>"
	+ /rst * "address<1>"

MACROCELL | 5 | 1 | C6/N90
ATTRIBUTES | 396034 | 0
INPUTS | 3 | rst  | address<0>  | saddress<0>
INPUTMC | 2 | 1 | 17 | 2 | 12
INPUTP | 1 | 21
EQ | 2 | 
    "mem_a<0>"  =  rst * "saddress<0>"
	+ /rst * "address<0>"

MACROCELL | 1 | 10 | C8/N6
ATTRIBUTES | 396034 | 0
INPUTS | 2 | rst  | current_state<3>.FBK".LFBK
INPUTMC | 1 | 1 | 12
INPUTP | 1 | 21
EQ | 1 | 
   /mem_wr  =  /rst * "current_state<3>.FBK".LFBK

MACROCELL | 1 | 11 | N675
ATTRIBUTES | 396034 | 0
INPUTS | 1 | rst
INPUTP | 1 | 21
EQ | 1 | 
    mem_rd  =  /rst

MACROCELL | 2 | 10 | N_clk$BUF0
ATTRIBUTES | 396034 | 0
INPUTS | 1 | clk
INPUTP | 1 | 31
EQ | 1 | 
    clock  =  clk

MACROCELL | 1 | 4 | N_din<7>$BUF0/N_din<7>$BUF0_TRST
ATTRIBUTES | 199424 | 0
OUTPUTMC | 8 | 3 | 10 | 3 | 14 | 3 | 13 | 3 | 16 | 1 | 1 | 1 | 2 | 1 | 7 | 1 | 8
INPUTS | 3 | rst  | current_state<3>.FBK".LFBK  | current_state<4>.FBK".LFBK
INPUTMC | 2 | 1 | 12 | 1 | 9
INPUTP | 1 | 21
EQ | 2 | 
    "N_din<7>$BUF0/N_din<7>$BUF0_TRST"  =  /rst * "current_state<3>.FBK".LFBK
	+ /rst * "current_state<4>.FBK".LFBK

PIN | clk | 8256 | 0 | N/A | 31 | 6 | 2 | 10 | 2 | 7 | 1 | 12 | 1 | 9 | 1 | 15 | 1 | 14
PIN | rst | 64 | 0 | N/A | 21 | 39 | 2 | 7 | 1 | 12 | 1 | 17 | 5 | 15 | 1 | 16 | 3 | 15 | 3 | 11 | 3 | 6 | 5 | 6 | 5 | 17 | 5 | 13 | 5 | 12 | 5 | 9 | 3 | 17 | 3 | 12 | 3 | 9 | 5 | 7 | 1 | 9 | 1 | 15 | 1 | 14 | 0 | 4 | 3 | 5 | 3 | 7 | 3 | 4 | 3 | 2 | 5 | 10 | 5 | 16 | 3 | 1 | 5 | 14 | 3 | 8 | 5 | 11 | 5 | 8 | 5 | 5 | 5 | 4 | 5 | 2 | 5 | 1 | 1 | 10 | 1 | 11 | 1 | 4
PIN | eoc | 64 | 0 | N/A | 47 | 2 | 1 | 12 | 1 | 14
PIN | din<0> | 64 | 0 | N/A | 76 | 1 | 3 | 10
PIN | din<1> | 64 | 0 | N/A | 70 | 1 | 3 | 14
PIN | din<2> | 64 | 0 | N/A | 74 | 1 | 3 | 13
PIN | din<3> | 64 | 0 | N/A | 78 | 1 | 1 | 1
PIN | din<4> | 64 | 0 | N/A | 82 | 1 | 3 | 16
PIN | din<5> | 64 | 0 | N/A | 80 | 1 | 1 | 2
PIN | din<6> | 64 | 0 | N/A | 83 | 1 | 1 | 7
PIN | din<7> | 64 | 0 | N/A | 86 | 1 | 1 | 8
PIN | datai | 64 | 0 | N/A | 14 | 1 | 2 | 12
PIN | clki | 64 | 0 | N/A | 16 | 15 | 2 | 12 | 2 | 11 | 2 | 9 | 2 | 8 | 2 | 6 | 2 | 4 | 2 | 3 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 2 | 5
PIN | load | 64 | 0 | N/A | 19 | 8 | 1 | 6 | 1 | 5 | 2 | 17 | 2 | 16 | 2 | 15 | 2 | 14 | 2 | 13 | 1 | 13
PIN | clko | 64 | 0 | N/A | 15 | 8 | 1 | 6 | 1 | 5 | 2 | 17 | 2 | 16 | 2 | 15 | 2 | 14 | 2 | 13 | 1 | 13
PIN | oe | 536871040 | 0 | N/A | 42
PIN | datao | 536871040 | 0 | N/A | 12
PIN | mem_a<13> | 536871040 | 0 | N/A | 117
PIN | mem_a<12> | 536871040 | 0 | N/A | 118
PIN | mem_a<11> | 536871040 | 0 | N/A | 116
PIN | mem_a<10> | 536871040 | 0 | N/A | 113
PIN | mem_a<9> | 536871040 | 0 | N/A | 99
PIN | mem_a<8> | 536871040 | 0 | N/A | 107
PIN | mem_a<7> | 536871040 | 0 | N/A | 112
PIN | mem_a<6> | 536871040 | 0 | N/A | 106
PIN | mem_a<14> | 536871040 | 0 | N/A | 120
PIN | mem_a<5> | 536871040 | 0 | N/A | 101
PIN | mem_a<4> | 536871040 | 0 | N/A | 97
PIN | mem_a<3> | 536871040 | 0 | N/A | 93
PIN | mem_a<2> | 536871040 | 0 | N/A | 91
PIN | mem_a<1> | 536871040 | 0 | N/A | 89
PIN | mem_a<0> | 536871040 | 0 | N/A | 88
PIN | mem_wr | 536871040 | 0 | N/A | 8
PIN | mem_rd | 536871040 | 0 | N/A | 10
PIN | clock | 536871040 | 0 | N/A | 51
PIN | start | 536870976 | 0 | N/A | 49 | 1 | 1 | 14
PIN | mem_f | 536870976 | 0 | N/A | 20 | 20 | 2 | 7 | 1 | 14 | 1 | 15 | 1 | 9 | 5 | 7 | 3 | 9 | 3 | 12 | 3 | 17 | 5 | 9 | 5 | 12 | 5 | 13 | 5 | 17 | 5 | 6 | 3 | 6 | 3 | 11 | 3 | 15 | 1 | 16 | 5 | 15 | 1 | 17 | 1 | 12
PIN | mem_d<0> | 536870976 | 0 | N/A | 121 | 1 | 1 | 6
PIN | mem_d<1> | 536870976 | 0 | N/A | 126 | 1 | 1 | 5
PIN | mem_d<2> | 536870976 | 0 | N/A | 124 | 1 | 2 | 17
PIN | mem_d<3> | 536870976 | 0 | N/A | 129 | 1 | 2 | 16
PIN | mem_d<4> | 536870976 | 0 | N/A | 127 | 1 | 2 | 15
PIN | mem_d<5> | 536870976 | 0 | N/A | 131 | 1 | 2 | 14
PIN | mem_d<6> | 536870976 | 0 | N/A | 4 | 1 | 2 | 13
PIN | mem_d<7> | 536870976 | 0 | N/A | 5 | 1 | 1 | 13