ex5.mfd

来自「[VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加」· MFD 代码 · 共 97 行

MDF Database:  version 1.0
MDF_INFO | ex5 | XC9572-7-PC84
MACROCELL | 3 | 16 | N_sout<0>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | sin  | clk
INPUTP | 2 | 32 | 35
EQ | 3 | 
    "sout<0>"  :=  sin
    "sout<0>".CLKF  =  clk
    "sout<0>".PRLD  =  GND

MACROCELL | 1 | 1 | N_sout<1>
ATTRIBUTES | 8848162 | 0
OUTPUTMC | 1 | 1 | 3
INPUTS | 2 | clk  | sout<0>".PIN
INPUTP | 2 | 35 | 82
EQ | 3 | 
    "sout<1>"  :=  "sout<0>".PIN
    "sout<1>".CLKF  =  clk
    "sout<1>".PRLD  =  GND

MACROCELL | 1 | 3 | N_sout<2>
ATTRIBUTES | 8848162 | 0
OUTPUTMC | 1 | 1 | 5
INPUTS | 2 | clk  | N_sout<1>.FBK".LFBK
INPUTMC | 1 | 1 | 1
INPUTP | 1 | 35
EQ | 3 | 
    "sout<2>"  :=  "N_sout<1>.FBK".LFBK
    "sout<2>".CLKF  =  clk
    "sout<2>".PRLD  =  GND

MACROCELL | 1 | 5 | N_sout<3>
ATTRIBUTES | 8848162 | 0
OUTPUTMC | 1 | 1 | 4
INPUTS | 2 | clk  | N_sout<2>.FBK".LFBK
INPUTMC | 1 | 1 | 3
INPUTP | 1 | 35
EQ | 3 | 
    "sout<3>"  :=  "N_sout<2>.FBK".LFBK
    "sout<3>".CLKF  =  clk
    "sout<3>".PRLD  =  GND

MACROCELL | 1 | 4 | N_sout<4>
ATTRIBUTES | 8848162 | 0
OUTPUTMC | 1 | 1 | 7
INPUTS | 2 | clk  | N_sout<3>.FBK".LFBK
INPUTMC | 1 | 1 | 5
INPUTP | 1 | 35
EQ | 3 | 
    "sout<4>"  :=  "N_sout<3>.FBK".LFBK
    "sout<4>".CLKF  =  clk
    "sout<4>".PRLD  =  GND

MACROCELL | 1 | 7 | N_sout<5>
ATTRIBUTES | 8848162 | 0
OUTPUTMC | 1 | 1 | 6
INPUTS | 2 | clk  | N_sout<4>.FBK".LFBK
INPUTMC | 1 | 1 | 4
INPUTP | 1 | 35
EQ | 3 | 
    "sout<5>"  :=  "N_sout<4>.FBK".LFBK
    "sout<5>".CLKF  =  clk
    "sout<5>".PRLD  =  GND

MACROCELL | 1 | 6 | N_sout<6>
ATTRIBUTES | 8848162 | 0
OUTPUTMC | 1 | 1 | 10
INPUTS | 2 | clk  | N_sout<5>.FBK".LFBK
INPUTMC | 1 | 1 | 7
INPUTP | 1 | 35
EQ | 3 | 
    "sout<6>"  :=  "N_sout<5>.FBK".LFBK
    "sout<6>".CLKF  =  clk
    "sout<6>".PRLD  =  GND

MACROCELL | 1 | 10 | N_sout<7>
ATTRIBUTES | 8782626 | 0
INPUTS | 2 | clk  | N_sout<6>.FBK".LFBK
INPUTMC | 1 | 1 | 6
INPUTP | 1 | 35
EQ | 3 | 
    "sout<7>"  :=  "N_sout<6>.FBK".LFBK
    "sout<7>".CLKF  =  clk
    "sout<7>".PRLD  =  GND

PIN | sin | 64 | 0 | N/A | 32 | 1 | 3 | 16
PIN | clk | 64 | 0 | N/A | 35 | 8 | 3 | 16 | 1 | 1 | 1 | 3 | 1 | 5 | 1 | 4 | 1 | 7 | 1 | 6 | 1 | 10
PIN | sout<1> | 536871040 | 0 | N/A | 86
PIN | sout<2> | 536871040 | 0 | N/A | 85
PIN | sout<3> | 536871040 | 0 | N/A | 88
PIN | sout<4> | 536871040 | 0 | N/A | 87
PIN | sout<5> | 536871040 | 0 | N/A | 89
PIN | sout<6> | 536871040 | 0 | N/A | 2
PIN | sout<7> | 536871040 | 0 | N/A | 3
PIN | sout<0> | 536870976 | 0 | N/A | 82 | 1 | 1 | 1