📄 ex5.vm6

📁 [VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][
💻 VM6
📖 第 1 页 / 共 2 页
字号:
上一页 12
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N_sout<4>.Q | 291 | ? | 0 | 0 | N_sout<4> | NULL | NULL | N_sout<4>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | PrldLow+OptxMapped+ClkInv | N_sout<5> | EX5_COPY_0_COPY_0 | 2222982144 | 2 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 241 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_sout<4>.FBK | 310 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<4>.Q | N_sout<4> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | N_sout<5>$Q | 252 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<5>.Q | N_sout<5> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N_sout<5> | 253 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<5>.Q | N_sout<5> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | N_sout<5>.FBK | 311 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<5>.Q | N_sout<5> | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | N_sout<5>.SI | N_sout<5> | 0 | 2 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 241 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_sout<4>.FBK | 310 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<4>.Q | N_sout<4> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N_sout<5>.D1 | 293 | ? | 0 | 4096 | N_sout<5> | NULL | NULL | N_sout<5>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N_sout<5>.D2 | 294 | ? | 0 | 4096 | N_sout<5> | NULL | NULL | N_sout<5>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | N_sout<4>.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | N_sout<5>.CLKF | 295 | ? | 0 | 4096 | N_sout<5> | NULL | NULL | N_sout<5>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk

SRFF_INSTANCE | N_sout<5>.REG | N_sout<5> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N_sout<5>.D | 292 | ? | 0 | 0 | N_sout<5> | NULL | NULL | N_sout<5>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | N_sout<5>.CLKF | 295 | ? | 0 | 4096 | N_sout<5> | NULL | NULL | N_sout<5>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N_sout<5>.Q | 296 | ? | 0 | 0 | N_sout<5> | NULL | NULL | N_sout<5>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | PrldLow+OptxMapped+ClkInv | N_sout<6> | EX5_COPY_0_COPY_0 | 2222982144 | 2 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 241 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_sout<5>.FBK | 311 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<5>.Q | N_sout<5> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | N_sout<6>$Q | 254 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<6>.Q | N_sout<6> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N_sout<6> | 255 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<6>.Q | N_sout<6> | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 5 | 0 | MC_FBK
NODE | N_sout<6>.FBK | 312 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<6>.Q | N_sout<6> | 5 | 0 | MC_FBK

SIGNAL_INSTANCE | N_sout<6>.SI | N_sout<6> | 0 | 2 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 241 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_sout<5>.FBK | 311 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<5>.Q | N_sout<5> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N_sout<6>.D1 | 298 | ? | 0 | 4096 | N_sout<6> | NULL | NULL | N_sout<6>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N_sout<6>.D2 | 299 | ? | 0 | 4096 | N_sout<6> | NULL | NULL | N_sout<6>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | N_sout<5>.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | N_sout<6>.CLKF | 300 | ? | 0 | 4096 | N_sout<6> | NULL | NULL | N_sout<6>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk

SRFF_INSTANCE | N_sout<6>.REG | N_sout<6> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N_sout<6>.D | 297 | ? | 0 | 0 | N_sout<6> | NULL | NULL | N_sout<6>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | N_sout<6>.CLKF | 300 | ? | 0 | 4096 | N_sout<6> | NULL | NULL | N_sout<6>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N_sout<6>.Q | 301 | ? | 0 | 0 | N_sout<6> | NULL | NULL | N_sout<6>.REG | 0 | 8 | SRFF_Q

MACROCELL_INSTANCE | PrldLow+OptxMapped | N_sout<7> | EX5_COPY_0_COPY_0 | 2155873280 | 2 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 241 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_sout<6>.FBK | 312 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<6>.Q | N_sout<6> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | N_sout<7> | 256 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<7>.Q | N_sout<7> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | N_sout<7>.UIM | 314 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<7>.Q | N_sout<7> | 1 | 0 | MC_UIM

SIGNAL_INSTANCE | N_sout<7>.SI | N_sout<7> | 0 | 2 | 3
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_clk | 241 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | N_clk | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | N_sout<6>.FBK | 312 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<6>.Q | N_sout<6> | 5 | 0 | MC_FBK
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | N_sout<7>.D1 | 303 | ? | 0 | 4096 | N_sout<7> | NULL | NULL | N_sout<7>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | N_sout<7>.D2 | 304 | ? | 0 | 4096 | N_sout<7> | NULL | NULL | N_sout<7>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 1 | IV_TRUE | N_sout<6>.FBK
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | N_sout<7>.CLKF | 305 | ? | 0 | 4096 | N_sout<7> | NULL | NULL | N_sout<7>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk

SRFF_INSTANCE | N_sout<7>.REG | N_sout<7> | 0 | 2 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | N_sout<7>.D | 302 | ? | 0 | 0 | N_sout<7> | NULL | NULL | N_sout<7>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | N_sout<7>.CLKF | 305 | ? | 0 | 4096 | N_sout<7> | NULL | NULL | N_sout<7>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 1 | IV_TRUE | N_clk
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | N_sout<7>.Q | 306 | ? | 0 | 0 | N_sout<7> | NULL | NULL | N_sout<7>.REG | 0 | 8 | SRFF_Q

OUTPUT_INSTANCE | 0 | sout<0> | EX5_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_sout<0>$Q | 242 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<0>.Q | N_sout<0> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sout<0> | 257 | PO | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | sout<0> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sout<1> | EX5_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_sout<1>$Q | 244 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<1>.Q | N_sout<1> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sout<1> | 258 | PO | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | sout<1> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sout<2> | EX5_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_sout<2>$Q | 246 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<2>.Q | N_sout<2> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sout<2> | 259 | PO | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | sout<2> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sout<3> | EX5_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_sout<3>$Q | 248 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<3>.Q | N_sout<3> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sout<3> | 260 | PO | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | sout<3> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sout<4> | EX5_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_sout<4>$Q | 250 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<4>.Q | N_sout<4> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sout<4> | 261 | PO | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | sout<4> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sout<5> | EX5_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_sout<5>$Q | 252 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<5>.Q | N_sout<5> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sout<5> | 262 | PO | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | sout<5> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sout<6> | EX5_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_sout<6>$Q | 254 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<6>.Q | N_sout<6> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sout<6> | 263 | PO | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | sout<6> | 0 | 6 | OI_OUT

OUTPUT_INSTANCE | 0 | sout<7> | EX5_COPY_0_COPY_0 | 3 | 1 | 1
INPUT_NODE_TYPE | 0 | 6 | OI_IN
NODE | N_sout<7> | 256 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | N_sout<7>.Q | N_sout<7> | 0 | 0 | MC_Q
OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
NODE | sout<7> | 264 | PO | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | sout<7> | 0 | 6 | OI_OUT

INPUT_INSTANCE | 0 | 0 | NULL | Pfbk_Created_sout<0> | EX5_COPY_0_COPY_0 | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 5 | II_IN
NODE | sout<0> | 257 | PO | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | sout<0> | 0 | 6 | OI_OUT
OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
NODE | sout<0>_PIN_BUF_ | 313 | ? | 0 | 0 | EX5_COPY_0_COPY_0 | NULL | NULL | Pfbk_Created_sout<0> | 0 | 5 | II_IMUX

FB_INSTANCE | FOOBAR1_ | EX5_COPY_0_COPY_0 | 0 | 0 | 0
FBPIN | 13 | NULL | 0 | N_sin | 0 | NULL | 0 | 20 | 49152
FBPIN | 16 | NULL | 0 | N_clk | 0 | NULL | 0 | 23 | 49152

FB_INSTANCE | FOOBAR2_ | EX5_COPY_0_COPY_0 | 0 | 0 | 0
FBPIN | 2 | N_sout<1> | 1 | NULL | 0 | sout<1> | 1 | 69 | 49152
FBPIN | 4 | N_sout<2> | 1 | NULL | 0 | sout<2> | 1 | 68 | 49152
FBPIN | 5 | N_sout<4> | 1 | NULL | 0 | sout<4> | 1 | 70 | 49152
FBPIN | 6 | N_sout<3> | 1 | NULL | 0 | sout<3> | 1 | 71 | 49152
FBPIN | 7 | N_sout<6> | 1 | NULL | 0 | sout<6> | 1 | 76 | 53248
FBPIN | 8 | N_sout<5> | 1 | NULL | 0 | sout<5> | 1 | 72 | 49152
FBPIN | 11 | N_sout<7> | 1 | NULL | 0 | sout<7> | 1 | 77 | 53248

FB_INSTANCE | FOOBAR3_ | EX5_COPY_0_COPY_0 | 0 | 0 | 0

FB_INSTANCE | FOOBAR4_ | EX5_COPY_0_COPY_0 | 0 | 0 | 0
FBPIN | 17 | N_sout<0> | 1 | Pfbk_Created_sout<0> | 1 | sout<0> | 1 | 66 | 49152

FB_INSTANCE | INPUTPINS_FOOBAR5_ | EX5_COPY_0_COPY_0 | 0 | 0 | 0

FB_ORDER_OF_INPUTS | FOOBAR2_ | 1 | N_sout<1>.FBK | NULL | 3 | N_sout<2>.FBK | NULL | 4 | N_sout<4>.FBK | NULL | 5 | N_sout<3>.FBK | NULL | 6 | N_sout<6>.FBK | NULL
FB_ORDER_OF_INPUTS | FOOBAR2_ | 7 | N_sout<5>.FBK | NULL | 12 | sout<0> | 66 | 13 | clk | 23

FB_IMUX_INDEX | FOOBAR2_ | -1 | 1 | -1 | 3 | 4 | 5 | 6 | 7 | -1 | -1 | -1 | -1 | 85 | 132 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1


FB_ORDER_OF_INPUTS | FOOBAR4_ | 6 | clk | 23 | 16 | sin | 20

FB_IMUX_INDEX | FOOBAR4_ | -1 | -1 | -1 | -1 | -1 | -1 | 132 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 123 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1
上一页 12
⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -