all_traffic.hier_info

来自「一个简单的交通灯程序(包括验证,主程序,和译码程序),在ALTER DE2板上实」· HIER_INFO 代码 · 共 257 行

|All_traffic


|All_traffic|traffic:inst
clk => led[4]~reg0.CLK
clk => led[3]~reg0.CLK
clk => led[2]~reg0.CLK
clk => led[1]~reg0.CLK
clk => led[0]~reg0.CLK
clk => east_west[7]~reg0.CLK
clk => east_west[6]~reg0.CLK
clk => east_west[5]~reg0.CLK
clk => east_west[4]~reg0.CLK
clk => east_west[3]~reg0.CLK
clk => east_west[2]~reg0.CLK
clk => east_west[1]~reg0.CLK
clk => east_west[0]~reg0.CLK
clk => south_north[7]~reg0.CLK
clk => south_north[6]~reg0.CLK
clk => south_north[5]~reg0.CLK
clk => south_north[4]~reg0.CLK
clk => south_north[3]~reg0.CLK
clk => south_north[2]~reg0.CLK
clk => south_north[1]~reg0.CLK
clk => south_north[0]~reg0.CLK
clk => led[5]~reg0.CLK
urgency => led[4]~reg0.ACLR
urgency => led[3]~reg0.ACLR
urgency => led[2]~reg0.ACLR
urgency => led[1]~reg0.ACLR
urgency => led[0]~reg0.PRESET
urgency => led[5]~reg0.PRESET
urgency => east_west[7]~reg0.ENA
urgency => east_west[6]~reg0.ENA
urgency => east_west[5]~reg0.ENA
urgency => east_west[4]~reg0.ENA
urgency => east_west[3]~reg0.ENA
urgency => east_west[2]~reg0.ENA
urgency => east_west[1]~reg0.ENA
urgency => east_west[0]~reg0.ENA
urgency => south_north[7]~reg0.ENA
urgency => south_north[6]~reg0.ENA
urgency => south_north[5]~reg0.ENA
urgency => south_north[4]~reg0.ENA
urgency => south_north[3]~reg0.ENA
urgency => south_north[2]~reg0.ENA
urgency => south_north[1]~reg0.ENA
urgency => south_north[0]~reg0.ENA
east_west[0] <= east_west[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_west[1] <= east_west[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_west[2] <= east_west[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_west[3] <= east_west[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_west[4] <= east_west[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_west[5] <= east_west[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_west[6] <= east_west[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_west[7] <= east_west[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_north[0] <= south_north[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_north[1] <= south_north[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_north[2] <= south_north[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_north[3] <= south_north[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_north[4] <= south_north[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_north[5] <= south_north[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_north[6] <= south_north[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_north[7] <= south_north[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
led[0] <= led[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
led[1] <= led[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
led[2] <= led[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
led[3] <= led[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
led[4] <= led[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
led[5] <= led[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_westa[0] <= east_west[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_westa[1] <= east_west[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_westa[2] <= east_west[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_westa[3] <= east_west[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_westb[0] <= east_west[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_westb[1] <= east_west[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_westb[2] <= east_west[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
east_westb[3] <= east_west[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_northa[0] <= south_north[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_northa[1] <= south_north[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_northa[2] <= south_north[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_northa[3] <= south_north[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_northb[0] <= south_north[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_northb[1] <= south_north[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_northb[2] <= south_north[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
south_northb[3] <= south_north[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|All_traffic|DECL7S:inst1
A[0] => Mux~0.IN13
A[0] => Mux~1.IN19
A[0] => Mux~2.IN13
A[0] => Mux~3.IN13
A[0] => Mux~4.IN13
A[0] => Mux~5.IN13
A[0] => Mux~6.IN13
A[0] => Mux~7.IN13
A[1] => Mux~0.IN12
A[1] => Mux~1.IN18
A[1] => Mux~2.IN12
A[1] => Mux~3.IN12
A[1] => Mux~4.IN12
A[1] => Mux~5.IN12
A[1] => Mux~6.IN12
A[1] => Mux~7.IN12
A[2] => Mux~0.IN11
A[2] => Mux~1.IN17
A[2] => Mux~2.IN11
A[2] => Mux~3.IN11
A[2] => Mux~4.IN11
A[2] => Mux~5.IN11
A[2] => Mux~6.IN11
A[2] => Mux~7.IN11
A[3] => Mux~0.IN10
A[3] => Mux~1.IN16
A[3] => Mux~2.IN10
A[3] => Mux~3.IN10
A[3] => Mux~4.IN10
A[3] => Mux~5.IN10
A[3] => Mux~6.IN10
A[3] => Mux~7.IN10
LED7S[0] <= LED7S[0]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[1] <= LED7S[1]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[2] <= LED7S[2]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[3] <= LED7S[3]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[4] <= LED7S[4]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[5] <= LED7S[5]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[6] <= LED7S[6]$latch.DB_MAX_OUTPUT_PORT_TYPE


|All_traffic|DECL7S:inst2
A[0] => Mux~0.IN13
A[0] => Mux~1.IN19
A[0] => Mux~2.IN13
A[0] => Mux~3.IN13
A[0] => Mux~4.IN13
A[0] => Mux~5.IN13
A[0] => Mux~6.IN13
A[0] => Mux~7.IN13
A[1] => Mux~0.IN12
A[1] => Mux~1.IN18
A[1] => Mux~2.IN12
A[1] => Mux~3.IN12
A[1] => Mux~4.IN12
A[1] => Mux~5.IN12
A[1] => Mux~6.IN12
A[1] => Mux~7.IN12
A[2] => Mux~0.IN11
A[2] => Mux~1.IN17
A[2] => Mux~2.IN11
A[2] => Mux~3.IN11
A[2] => Mux~4.IN11
A[2] => Mux~5.IN11
A[2] => Mux~6.IN11
A[2] => Mux~7.IN11
A[3] => Mux~0.IN10
A[3] => Mux~1.IN16
A[3] => Mux~2.IN10
A[3] => Mux~3.IN10
A[3] => Mux~4.IN10
A[3] => Mux~5.IN10
A[3] => Mux~6.IN10
A[3] => Mux~7.IN10
LED7S[0] <= LED7S[0]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[1] <= LED7S[1]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[2] <= LED7S[2]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[3] <= LED7S[3]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[4] <= LED7S[4]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[5] <= LED7S[5]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[6] <= LED7S[6]$latch.DB_MAX_OUTPUT_PORT_TYPE


|All_traffic|DECL7S:inst3
A[0] => Mux~0.IN13
A[0] => Mux~1.IN19
A[0] => Mux~2.IN13
A[0] => Mux~3.IN13
A[0] => Mux~4.IN13
A[0] => Mux~5.IN13
A[0] => Mux~6.IN13
A[0] => Mux~7.IN13
A[1] => Mux~0.IN12
A[1] => Mux~1.IN18
A[1] => Mux~2.IN12
A[1] => Mux~3.IN12
A[1] => Mux~4.IN12
A[1] => Mux~5.IN12
A[1] => Mux~6.IN12
A[1] => Mux~7.IN12
A[2] => Mux~0.IN11
A[2] => Mux~1.IN17
A[2] => Mux~2.IN11
A[2] => Mux~3.IN11
A[2] => Mux~4.IN11
A[2] => Mux~5.IN11
A[2] => Mux~6.IN11
A[2] => Mux~7.IN11
A[3] => Mux~0.IN10
A[3] => Mux~1.IN16
A[3] => Mux~2.IN10
A[3] => Mux~3.IN10
A[3] => Mux~4.IN10
A[3] => Mux~5.IN10
A[3] => Mux~6.IN10
A[3] => Mux~7.IN10
LED7S[0] <= LED7S[0]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[1] <= LED7S[1]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[2] <= LED7S[2]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[3] <= LED7S[3]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[4] <= LED7S[4]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[5] <= LED7S[5]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[6] <= LED7S[6]$latch.DB_MAX_OUTPUT_PORT_TYPE


|All_traffic|DECL7S:inst4
A[0] => Mux~0.IN13
A[0] => Mux~1.IN19
A[0] => Mux~2.IN13
A[0] => Mux~3.IN13
A[0] => Mux~4.IN13
A[0] => Mux~5.IN13
A[0] => Mux~6.IN13
A[0] => Mux~7.IN13
A[1] => Mux~0.IN12
A[1] => Mux~1.IN18
A[1] => Mux~2.IN12
A[1] => Mux~3.IN12
A[1] => Mux~4.IN12
A[1] => Mux~5.IN12
A[1] => Mux~6.IN12
A[1] => Mux~7.IN12
A[2] => Mux~0.IN11
A[2] => Mux~1.IN17
A[2] => Mux~2.IN11
A[2] => Mux~3.IN11
A[2] => Mux~4.IN11
A[2] => Mux~5.IN11
A[2] => Mux~6.IN11
A[2] => Mux~7.IN11
A[3] => Mux~0.IN10
A[3] => Mux~1.IN16
A[3] => Mux~2.IN10
A[3] => Mux~3.IN10
A[3] => Mux~4.IN10
A[3] => Mux~5.IN10
A[3] => Mux~6.IN10
A[3] => Mux~7.IN10
LED7S[0] <= LED7S[0]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[1] <= LED7S[1]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[2] <= LED7S[2]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[3] <= LED7S[3]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[4] <= LED7S[4]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[5] <= LED7S[5]$latch.DB_MAX_OUTPUT_PORT_TYPE
LED7S[6] <= LED7S[6]$latch.DB_MAX_OUTPUT_PORT_TYPE